Analysis & Synthesis report for test_neorv32 Wed Feb 8 15:41:39 2023 Quartus Prime Version 22.1std.0 Build 915 10/25/2022 SC Standard Edition --------------------- ; Table of Contents ; --------------------- 1. Legal Notice 2. Analysis & Synthesis Summary 3. Analysis & Synthesis Settings 4. Parallel Compilation 5. Analysis & Synthesis Source Files Read 6. Analysis & Synthesis Resource Usage Summary 7. Analysis & Synthesis Resource Utilization by Entity 8. Analysis & Synthesis RAM Summary 9. State Machine - |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_busswitch:neorv32_busswitch_inst|arbiter.state 10. State Machine - |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_alu:neorv32_cpu_alu_inst|neorv32_cpu_cp_muldiv:\neorv32_cpu_cp_muldiv_inst_true:neorv32_cpu_cp_muldiv_inst|ctrl.state 11. State Machine - |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|debug_ctrl.state 12. State Machine - |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|execute_engine.state_prev2 13. State Machine - |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|execute_engine.state_prev 14. State Machine - |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|execute_engine.state 15. State Machine - |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|fetch_engine.state_prev 16. State Machine - |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|fetch_engine.state 17. Registers Removed During Synthesis 18. Removed Registers Triggering Further Register Optimizations 19. General Register Statistics 20. Inverted Register Statistics 21. Registers Packed Into Inferred Megafunctions 22. Multiplexer Restructuring Statistics (No Restructuring Performed) 23. Source assignments for neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_regfile:neorv32_cpu_regfile_inst|altsyncram:reg_file[0][31]__1|altsyncram_u2n1:auto_generated 24. Source assignments for neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_regfile:neorv32_cpu_regfile_inst|altsyncram:reg_file[0][31]__2|altsyncram_u2n1:auto_generated 25. Source assignments for neorv32_top:neorv32_top_inst|neorv32_dmem:\neorv32_int_dmem_inst_true:neorv32_int_dmem_inst|altsyncram:mem_ram_b0_rtl_0|altsyncram_c6q1:auto_generated 26. Source assignments for neorv32_top:neorv32_top_inst|neorv32_dmem:\neorv32_int_dmem_inst_true:neorv32_int_dmem_inst|altsyncram:mem_ram_b1_rtl_0|altsyncram_c6q1:auto_generated 27. Source assignments for neorv32_top:neorv32_top_inst|neorv32_dmem:\neorv32_int_dmem_inst_true:neorv32_int_dmem_inst|altsyncram:mem_ram_b2_rtl_0|altsyncram_c6q1:auto_generated 28. Source assignments for neorv32_top:neorv32_top_inst|neorv32_dmem:\neorv32_int_dmem_inst_true:neorv32_int_dmem_inst|altsyncram:mem_ram_b3_rtl_0|altsyncram_c6q1:auto_generated 29. Parameter Settings for User Entity Instance: Top-level Entity: |neorv32_test_setup_approm 30. Parameter Settings for User Entity Instance: neorv32_top:neorv32_top_inst 31. Parameter Settings for User Entity Instance: neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst 32. Parameter Settings for User Entity Instance: neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst 33. Parameter Settings for User Entity Instance: neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|neorv32_fifo:\prefetch_buffer:0:prefetch_buffer_inst 34. Parameter Settings for User Entity Instance: neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|neorv32_fifo:\prefetch_buffer:1:prefetch_buffer_inst 35. Parameter Settings for User Entity Instance: neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|neorv32_cpu_decompressor:\neorv32_cpu_decompressor_inst_true:neorv32_cpu_decompressor_inst 36. Parameter Settings for User Entity Instance: neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_regfile:neorv32_cpu_regfile_inst 37. Parameter Settings for User Entity Instance: neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_regfile:neorv32_cpu_regfile_inst|altsyncram:reg_file[0][31]__1 38. Parameter Settings for User Entity Instance: neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_regfile:neorv32_cpu_regfile_inst|altsyncram:reg_file[0][31]__2 39. Parameter Settings for User Entity Instance: neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_alu:neorv32_cpu_alu_inst 40. Parameter Settings for User Entity Instance: neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_alu:neorv32_cpu_alu_inst|neorv32_cpu_cp_shifter:neorv32_cpu_cp_shifter_inst 41. Parameter Settings for User Entity Instance: neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_alu:neorv32_cpu_alu_inst|neorv32_cpu_cp_muldiv:\neorv32_cpu_cp_muldiv_inst_true:neorv32_cpu_cp_muldiv_inst 42. Parameter Settings for User Entity Instance: neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_bus:neorv32_cpu_bus_inst 43. Parameter Settings for User Entity Instance: neorv32_top:neorv32_top_inst|neorv32_busswitch:neorv32_busswitch_inst 44. Parameter Settings for User Entity Instance: neorv32_top:neorv32_top_inst|neorv32_imem:\neorv32_int_imem_inst_true:neorv32_int_imem_inst 45. Parameter Settings for User Entity Instance: neorv32_top:neorv32_top_inst|neorv32_dmem:\neorv32_int_dmem_inst_true:neorv32_int_dmem_inst 46. Parameter Settings for User Entity Instance: neorv32_top:neorv32_top_inst|neorv32_sysinfo:neorv32_sysinfo_inst 47. Parameter Settings for Inferred Entity Instance: neorv32_top:neorv32_top_inst|neorv32_dmem:\neorv32_int_dmem_inst_true:neorv32_int_dmem_inst|altsyncram:mem_ram_b0_rtl_0 48. Parameter Settings for Inferred Entity Instance: neorv32_top:neorv32_top_inst|neorv32_dmem:\neorv32_int_dmem_inst_true:neorv32_int_dmem_inst|altsyncram:mem_ram_b1_rtl_0 49. Parameter Settings for Inferred Entity Instance: neorv32_top:neorv32_top_inst|neorv32_dmem:\neorv32_int_dmem_inst_true:neorv32_int_dmem_inst|altsyncram:mem_ram_b2_rtl_0 50. Parameter Settings for Inferred Entity Instance: neorv32_top:neorv32_top_inst|neorv32_dmem:\neorv32_int_dmem_inst_true:neorv32_int_dmem_inst|altsyncram:mem_ram_b3_rtl_0 51. altsyncram Parameter Settings by Entity Instance 52. Port Connectivity Checks: "neorv32_top:neorv32_top_inst|neorv32_bus_keeper:neorv32_bus_keeper_inst" 53. Port Connectivity Checks: "neorv32_top:neorv32_top_inst|neorv32_busswitch:neorv32_busswitch_inst" 54. Port Connectivity Checks: "neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|neorv32_fifo:\prefetch_buffer:1:prefetch_buffer_inst" 55. Port Connectivity Checks: "neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|neorv32_fifo:\prefetch_buffer:0:prefetch_buffer_inst" 56. Port Connectivity Checks: "neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst" 57. Port Connectivity Checks: "neorv32_top:neorv32_top_inst" 58. Post-Synthesis Netlist Statistics for Top Partition 59. Elapsed Time Per Partition 60. Analysis & Synthesis Messages ---------------- ; Legal Notice ; ---------------- Copyright (C) 2022 Intel Corporation. All rights reserved. Your use of Intel Corporation's design tools, logic functions and other software and tools, and any partner logic functions, and any output files from any of the foregoing (including device programming or simulation files), and any associated documentation or information are expressly subject to the terms and conditions of the Intel Program License Subscription Agreement, the Intel Quartus Prime License Agreement, the Intel FPGA IP License Agreement, or other applicable license agreement, including, without limitation, that your use is for the sole purpose of programming logic devices manufactured by Intel and sold by Intel or its authorized distributors. Please refer to the applicable agreement for further details, at https://fpgasoftware.intel.com/eula. +--------------------------------------------------------------------------------------+ ; Analysis & Synthesis Summary ; +---------------------------------+----------------------------------------------------+ ; Analysis & Synthesis Status ; Successful - Wed Feb 8 15:41:39 2023 ; ; Quartus Prime Version ; 22.1std.0 Build 915 10/25/2022 SC Standard Edition ; ; Revision Name ; test_neorv32 ; ; Top-level Entity Name ; neorv32_test_setup_approm ; ; Family ; Cyclone V ; ; Logic utilization (in ALMs) ; N/A ; ; Total registers ; 1315 ; ; Total pins ; 10 ; ; Total virtual pins ; 0 ; ; Total block memory bits ; 67,584 ; ; Total DSP Blocks ; 0 ; ; Total HSSI RX PCSs ; 0 ; ; Total HSSI PMA RX Deserializers ; 0 ; ; Total HSSI TX PCSs ; 0 ; ; Total HSSI PMA TX Serializers ; 0 ; ; Total PLLs ; 0 ; ; Total DLLs ; 0 ; +---------------------------------+----------------------------------------------------+ +----------------------------------------------------------------------------------------------------------------------------------+ ; Analysis & Synthesis Settings ; +---------------------------------------------------------------------------------+---------------------------+--------------------+ ; Option ; Setting ; Default Value ; +---------------------------------------------------------------------------------+---------------------------+--------------------+ ; Device ; 5CSEMA5F31C6 ; ; ; Top-level entity name ; neorv32_test_setup_approm ; test_neorv32 ; ; Family name ; Cyclone V ; Cyclone V ; ; Restructure Multiplexers ; Off ; Auto ; ; Optimization Technique ; Speed ; Balanced ; ; Use smart compilation ; Off ; Off ; ; Enable parallel Assembler and Timing Analyzer during compilation ; On ; On ; ; Enable compact report table ; Off ; Off ; ; MLAB Add Timing Constraints For Mixed-Port Feed-Through Mode Setting Don't Care ; Off ; Off ; ; Create Debugging Nodes for IP Cores ; Off ; Off ; ; Preserve fewer node names ; On ; On ; ; Intel FPGA IP Evaluation Mode ; Enable ; Enable ; ; Verilog Version ; Verilog_2001 ; Verilog_2001 ; ; VHDL Version ; VHDL_1993 ; VHDL_1993 ; ; State Machine Processing ; Auto ; Auto ; ; Safe State Machine ; Off ; Off ; ; Extract Verilog State Machines ; On ; On ; ; Extract VHDL State Machines ; On ; On ; ; Ignore Verilog initial constructs ; Off ; Off ; ; Iteration limit for constant Verilog loops ; 5000 ; 5000 ; ; Iteration limit for non-constant Verilog loops ; 250 ; 250 ; ; Add Pass-Through Logic to Inferred RAMs ; On ; On ; ; Infer RAMs from Raw Logic ; On ; On ; ; Parallel Synthesis ; On ; On ; ; DSP Block Balancing ; Auto ; Auto ; ; NOT Gate Push-Back ; On ; On ; ; Power-Up Don't Care ; On ; On ; ; Remove Redundant Logic Cells ; Off ; Off ; ; Remove Duplicate Registers ; On ; On ; ; Ignore CARRY Buffers ; Off ; Off ; ; Ignore CASCADE Buffers ; Off ; Off ; ; Ignore GLOBAL Buffers ; Off ; Off ; ; Ignore ROW GLOBAL Buffers ; Off ; Off ; ; Ignore LCELL Buffers ; Off ; Off ; ; Ignore SOFT Buffers ; On ; On ; ; Limit AHDL Integers to 32 Bits ; Off ; Off ; ; Carry Chain Length ; 70 ; 70 ; ; Auto Carry Chains ; On ; On ; ; Auto Open-Drain Pins ; On ; On ; ; Perform WYSIWYG Primitive Resynthesis ; Off ; Off ; ; Auto ROM Replacement ; On ; On ; ; Auto RAM Replacement ; On ; On ; ; Auto DSP Block Replacement ; On ; On ; ; Auto Shift Register Replacement ; Auto ; Auto ; ; Allow Shift Register Merging across Hierarchies ; Auto ; Auto ; ; Auto Clock Enable Replacement ; On ; On ; ; Strict RAM Replacement ; Off ; Off ; ; Allow Synchronous Control Signals ; On ; On ; ; Force Use of Synchronous Clear Signals ; Off ; Off ; ; Auto Resource Sharing ; Off ; Off ; ; Allow Any RAM Size For Recognition ; Off ; Off ; ; Allow Any ROM Size For Recognition ; Off ; Off ; ; Allow Any Shift Register Size For Recognition ; Off ; Off ; ; Use LogicLock Constraints during Resource Balancing ; On ; On ; ; Ignore translate_off and synthesis_off directives ; Off ; Off ; ; Timing-Driven Synthesis ; On ; On ; ; Report Parameter Settings ; On ; On ; ; Report Source Assignments ; On ; On ; ; Report Connectivity Checks ; On ; On ; ; Ignore Maximum Fan-Out Assignments ; Off ; Off ; ; Synchronization Register Chain Length ; 3 ; 3 ; ; Power Optimization During Synthesis ; Normal compilation ; Normal compilation ; ; HDL message level ; Level2 ; Level2 ; ; Suppress Register Optimization Related Messages ; Off ; Off ; ; Number of Removed Registers Reported in Synthesis Report ; 5000 ; 5000 ; ; Number of Swept Nodes Reported in Synthesis Report ; 5000 ; 5000 ; ; Number of Inverted Registers Reported in Synthesis Report ; 100 ; 100 ; ; Clock MUX Protection ; On ; On ; ; Auto Gated Clock Conversion ; Off ; Off ; ; Block Design Naming ; Auto ; Auto ; ; SDC constraint protection ; Off ; Off ; ; Synthesis Effort ; Auto ; Auto ; ; Shift Register Replacement - Allow Asynchronous Clear Signal ; On ; On ; ; Pre-Mapping Resynthesis Optimization ; Off ; Off ; ; Analysis & Synthesis Message Level ; Medium ; Medium ; ; Disable Register Merging Across Hierarchies ; Auto ; Auto ; ; Resource Aware Inference For Block RAM ; On ; On ; ; Automatic Parallel Synthesis ; On ; On ; ; Partial Reconfiguration Bitstream ID ; Off ; Off ; +---------------------------------------------------------------------------------+---------------------------+--------------------+ +------------------------------------------+ ; Parallel Compilation ; +----------------------------+-------------+ ; Processors ; Number ; +----------------------------+-------------+ ; Number detected on machine ; 4 ; ; Maximum allowed ; 4 ; ; ; ; ; Average used ; 1.00 ; ; Maximum used ; 4 ; ; ; ; ; Usage by Processor ; % Time Used ; ; Processor 1 ; 100.0% ; ; Processor 2 ; 0.1% ; ; Processor 3 ; 0.0% ; ; Processor 4 ; 0.0% ; +----------------------------+-------------+ +----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Analysis & Synthesis Source Files Read ; +----------------------------------------------------------+-----------------+------------------------------+------------------------------------------------------------------------------------+---------+ ; File Name with User-Entered Path ; Used in Netlist ; File Type ; File Name with Absolute Path ; Library ; +----------------------------------------------------------+-----------------+------------------------------+------------------------------------------------------------------------------------+---------+ ; ../neorv32/rtl/test_setups/neorv32_test_setup_approm.vhd ; yes ; User VHDL File ; /home/seti/neorv32/rtl/test_setups/neorv32_test_setup_approm.vhd ; ; ; ../neorv32/rtl/core/mem/neorv32_imem.default.vhd ; yes ; User VHDL File ; /home/seti/neorv32/rtl/core/mem/neorv32_imem.default.vhd ; neorv32 ; ; ../neorv32/rtl/core/mem/neorv32_dmem.default.vhd ; yes ; User VHDL File ; /home/seti/neorv32/rtl/core/mem/neorv32_dmem.default.vhd ; neorv32 ; ; ../neorv32/rtl/core/neorv32_top.vhd ; yes ; User VHDL File ; /home/seti/neorv32/rtl/core/neorv32_top.vhd ; neorv32 ; ; ../neorv32/rtl/core/neorv32_sysinfo.vhd ; yes ; User VHDL File ; /home/seti/neorv32/rtl/core/neorv32_sysinfo.vhd ; neorv32 ; ; ../neorv32/rtl/core/neorv32_package.vhd ; yes ; User VHDL File ; /home/seti/neorv32/rtl/core/neorv32_package.vhd ; neorv32 ; ; ../neorv32/rtl/core/neorv32_mtime.vhd ; yes ; User VHDL File ; /home/seti/neorv32/rtl/core/neorv32_mtime.vhd ; neorv32 ; ; ../neorv32/rtl/core/neorv32_imem.entity.vhd ; yes ; User VHDL File ; /home/seti/neorv32/rtl/core/neorv32_imem.entity.vhd ; neorv32 ; ; ../neorv32/rtl/core/neorv32_gpio.vhd ; yes ; User VHDL File ; /home/seti/neorv32/rtl/core/neorv32_gpio.vhd ; neorv32 ; ; ../neorv32/rtl/core/neorv32_fifo.vhd ; yes ; User VHDL File ; /home/seti/neorv32/rtl/core/neorv32_fifo.vhd ; neorv32 ; ; ../neorv32/rtl/core/neorv32_dmem.entity.vhd ; yes ; User VHDL File ; /home/seti/neorv32/rtl/core/neorv32_dmem.entity.vhd ; neorv32 ; ; ../neorv32/rtl/core/neorv32_cpu_regfile.vhd ; yes ; User VHDL File ; /home/seti/neorv32/rtl/core/neorv32_cpu_regfile.vhd ; neorv32 ; ; ../neorv32/rtl/core/neorv32_cpu_decompressor.vhd ; yes ; User VHDL File ; /home/seti/neorv32/rtl/core/neorv32_cpu_decompressor.vhd ; neorv32 ; ; ../neorv32/rtl/core/neorv32_cpu_cp_shifter.vhd ; yes ; User VHDL File ; /home/seti/neorv32/rtl/core/neorv32_cpu_cp_shifter.vhd ; neorv32 ; ; ../neorv32/rtl/core/neorv32_cpu_cp_muldiv.vhd ; yes ; User VHDL File ; /home/seti/neorv32/rtl/core/neorv32_cpu_cp_muldiv.vhd ; neorv32 ; ; ../neorv32/rtl/core/neorv32_cpu_control.vhd ; yes ; User VHDL File ; /home/seti/neorv32/rtl/core/neorv32_cpu_control.vhd ; neorv32 ; ; ../neorv32/rtl/core/neorv32_cpu_bus.vhd ; yes ; User VHDL File ; /home/seti/neorv32/rtl/core/neorv32_cpu_bus.vhd ; neorv32 ; ; ../neorv32/rtl/core/neorv32_cpu_alu.vhd ; yes ; User VHDL File ; /home/seti/neorv32/rtl/core/neorv32_cpu_alu.vhd ; neorv32 ; ; ../neorv32/rtl/core/neorv32_cpu.vhd ; yes ; User VHDL File ; /home/seti/neorv32/rtl/core/neorv32_cpu.vhd ; neorv32 ; ; ../neorv32/rtl/core/neorv32_busswitch.vhd ; yes ; User VHDL File ; /home/seti/neorv32/rtl/core/neorv32_busswitch.vhd ; neorv32 ; ; ../neorv32/rtl/core/neorv32_bus_keeper.vhd ; yes ; User VHDL File ; /home/seti/neorv32/rtl/core/neorv32_bus_keeper.vhd ; neorv32 ; ; ../neorv32/rtl/core/neorv32_bootloader_image.vhd ; yes ; User VHDL File ; /home/seti/neorv32/rtl/core/neorv32_bootloader_image.vhd ; neorv32 ; ; ../neorv32/rtl/core/neorv32_application_image.vhd ; yes ; User VHDL File ; /home/seti/neorv32/rtl/core/neorv32_application_image.vhd ; neorv32 ; ; altsyncram.tdf ; yes ; Megafunction ; /home/seti/intelFPGA/22.1std/quartus/libraries/megafunctions/altsyncram.tdf ; ; ; stratix_ram_block.inc ; yes ; Megafunction ; /home/seti/intelFPGA/22.1std/quartus/libraries/megafunctions/stratix_ram_block.inc ; ; ; lpm_mux.inc ; yes ; Megafunction ; /home/seti/intelFPGA/22.1std/quartus/libraries/megafunctions/lpm_mux.inc ; ; ; lpm_decode.inc ; yes ; Megafunction ; /home/seti/intelFPGA/22.1std/quartus/libraries/megafunctions/lpm_decode.inc ; ; ; aglobal221.inc ; yes ; Megafunction ; /home/seti/intelFPGA/22.1std/quartus/libraries/megafunctions/aglobal221.inc ; ; ; a_rdenreg.inc ; yes ; Megafunction ; /home/seti/intelFPGA/22.1std/quartus/libraries/megafunctions/a_rdenreg.inc ; ; ; altrom.inc ; yes ; Megafunction ; /home/seti/intelFPGA/22.1std/quartus/libraries/megafunctions/altrom.inc ; ; ; altram.inc ; yes ; Megafunction ; /home/seti/intelFPGA/22.1std/quartus/libraries/megafunctions/altram.inc ; ; ; altdpram.inc ; yes ; Megafunction ; /home/seti/intelFPGA/22.1std/quartus/libraries/megafunctions/altdpram.inc ; ; ; db/altsyncram_u2n1.tdf ; yes ; Auto-Generated Megafunction ; /home/seti/quartus_project/db/altsyncram_u2n1.tdf ; ; ; db/altsyncram_c6q1.tdf ; yes ; Auto-Generated Megafunction ; /home/seti/quartus_project/db/altsyncram_c6q1.tdf ; ; +----------------------------------------------------------+-----------------+------------------------------+------------------------------------------------------------------------------------+---------+ +-----------------------------------------------------------+ ; Analysis & Synthesis Resource Usage Summary ; +---------------------------------------------+-------------+ ; Resource ; Usage ; +---------------------------------------------+-------------+ ; Estimate of Logic utilization (ALMs needed) ; 1601 ; ; ; ; ; Combinational ALUT usage for logic ; 2482 ; ; -- 7 input functions ; 78 ; ; -- 6 input functions ; 578 ; ; -- 5 input functions ; 462 ; ; -- 4 input functions ; 537 ; ; -- <=3 input functions ; 827 ; ; ; ; ; Dedicated logic registers ; 1315 ; ; ; ; ; I/O pins ; 10 ; ; Total MLAB memory bits ; 0 ; ; Total block memory bits ; 67584 ; ; ; ; ; Total DSP Blocks ; 0 ; ; ; ; ; Maximum fan-out node ; clk_i~input ; ; Maximum fan-out ; 1411 ; ; Total fan-out ; 16733 ; ; Average fan-out ; 4.28 ; +---------------------------------------------+-------------+ +---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Analysis & Synthesis Resource Utilization by Entity ; +----------------------------------------------------------------------------------------------------------+---------------------+---------------------------+-------------------+------------+------+--------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------------+--------------+ ; Compilation Hierarchy Node ; Combinational ALUTs ; Dedicated Logic Registers ; Block Memory Bits ; DSP Blocks ; Pins ; Virtual Pins ; Full Hierarchy Name ; Entity Name ; Library Name ; +----------------------------------------------------------------------------------------------------------+---------------------+---------------------------+-------------------+------------+------+--------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------------+--------------+ ; |neorv32_test_setup_approm ; 2482 (1) ; 1315 (0) ; 67584 ; 0 ; 10 ; 0 ; |neorv32_test_setup_approm ; neorv32_test_setup_approm ; work ; ; |neorv32_top:neorv32_top_inst| ; 2481 (68) ; 1315 (5) ; 67584 ; 0 ; 0 ; 0 ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst ; neorv32_top ; neorv32 ; ; |neorv32_bus_keeper:neorv32_bus_keeper_inst| ; 15 (15) ; 12 (12) ; 0 ; 0 ; 0 ; 0 ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_bus_keeper:neorv32_bus_keeper_inst ; neorv32_bus_keeper ; neorv32 ; ; |neorv32_busswitch:neorv32_busswitch_inst| ; 62 (62) ; 8 (8) ; 0 ; 0 ; 0 ; 0 ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_busswitch:neorv32_busswitch_inst ; neorv32_busswitch ; neorv32 ; ; |neorv32_cpu:neorv32_cpu_inst| ; 1810 (0) ; 983 (0) ; 2048 ; 0 ; 0 ; 0 ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst ; neorv32_cpu ; neorv32 ; ; |neorv32_cpu_alu:neorv32_cpu_alu_inst| ; 531 (164) ; 212 (0) ; 0 ; 0 ; 0 ; 0 ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_alu:neorv32_cpu_alu_inst ; neorv32_cpu_alu ; neorv32 ; ; |neorv32_cpu_cp_muldiv:\neorv32_cpu_cp_muldiv_inst_true:neorv32_cpu_cp_muldiv_inst| ; 322 (322) ; 173 (173) ; 0 ; 0 ; 0 ; 0 ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_alu:neorv32_cpu_alu_inst|neorv32_cpu_cp_muldiv:\neorv32_cpu_cp_muldiv_inst_true:neorv32_cpu_cp_muldiv_inst ; neorv32_cpu_cp_muldiv ; neorv32 ; ; |neorv32_cpu_cp_shifter:neorv32_cpu_cp_shifter_inst| ; 45 (45) ; 39 (39) ; 0 ; 0 ; 0 ; 0 ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_alu:neorv32_cpu_alu_inst|neorv32_cpu_cp_shifter:neorv32_cpu_cp_shifter_inst ; neorv32_cpu_cp_shifter ; neorv32 ; ; |neorv32_cpu_bus:neorv32_cpu_bus_inst| ; 73 (73) ; 103 (103) ; 0 ; 0 ; 0 ; 0 ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_bus:neorv32_cpu_bus_inst ; neorv32_cpu_bus ; neorv32 ; ; |neorv32_cpu_control:neorv32_cpu_control_inst| ; 1087 (1021) ; 668 (592) ; 0 ; 0 ; 0 ; 0 ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst ; neorv32_cpu_control ; neorv32 ; ; |neorv32_cpu_decompressor:\neorv32_cpu_decompressor_inst_true:neorv32_cpu_decompressor_inst| ; 52 (52) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|neorv32_cpu_decompressor:\neorv32_cpu_decompressor_inst_true:neorv32_cpu_decompressor_inst ; neorv32_cpu_decompressor ; neorv32 ; ; |neorv32_fifo:\prefetch_buffer:0:prefetch_buffer_inst| ; 7 (7) ; 38 (38) ; 0 ; 0 ; 0 ; 0 ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|neorv32_fifo:\prefetch_buffer:0:prefetch_buffer_inst ; neorv32_fifo ; neorv32 ; ; |neorv32_fifo:\prefetch_buffer:1:prefetch_buffer_inst| ; 7 (7) ; 38 (38) ; 0 ; 0 ; 0 ; 0 ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|neorv32_fifo:\prefetch_buffer:1:prefetch_buffer_inst ; neorv32_fifo ; neorv32 ; ; |neorv32_cpu_regfile:neorv32_cpu_regfile_inst| ; 119 (119) ; 0 (0) ; 2048 ; 0 ; 0 ; 0 ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_regfile:neorv32_cpu_regfile_inst ; neorv32_cpu_regfile ; neorv32 ; ; |altsyncram:reg_file[0][31]__1| ; 0 (0) ; 0 (0) ; 1024 ; 0 ; 0 ; 0 ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_regfile:neorv32_cpu_regfile_inst|altsyncram:reg_file[0][31]__1 ; altsyncram ; work ; ; |altsyncram_u2n1:auto_generated| ; 0 (0) ; 0 (0) ; 1024 ; 0 ; 0 ; 0 ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_regfile:neorv32_cpu_regfile_inst|altsyncram:reg_file[0][31]__1|altsyncram_u2n1:auto_generated ; altsyncram_u2n1 ; work ; ; |altsyncram:reg_file[0][31]__2| ; 0 (0) ; 0 (0) ; 1024 ; 0 ; 0 ; 0 ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_regfile:neorv32_cpu_regfile_inst|altsyncram:reg_file[0][31]__2 ; altsyncram ; work ; ; |altsyncram_u2n1:auto_generated| ; 0 (0) ; 0 (0) ; 1024 ; 0 ; 0 ; 0 ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_regfile:neorv32_cpu_regfile_inst|altsyncram:reg_file[0][31]__2|altsyncram_u2n1:auto_generated ; altsyncram_u2n1 ; work ; ; |neorv32_dmem:\neorv32_int_dmem_inst_true:neorv32_int_dmem_inst| ; 19 (19) ; 2 (2) ; 65536 ; 0 ; 0 ; 0 ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_dmem:\neorv32_int_dmem_inst_true:neorv32_int_dmem_inst ; neorv32_dmem ; neorv32 ; ; |altsyncram:mem_ram_b0_rtl_0| ; 0 (0) ; 0 (0) ; 16384 ; 0 ; 0 ; 0 ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_dmem:\neorv32_int_dmem_inst_true:neorv32_int_dmem_inst|altsyncram:mem_ram_b0_rtl_0 ; altsyncram ; work ; ; |altsyncram_c6q1:auto_generated| ; 0 (0) ; 0 (0) ; 16384 ; 0 ; 0 ; 0 ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_dmem:\neorv32_int_dmem_inst_true:neorv32_int_dmem_inst|altsyncram:mem_ram_b0_rtl_0|altsyncram_c6q1:auto_generated ; altsyncram_c6q1 ; work ; ; |altsyncram:mem_ram_b1_rtl_0| ; 0 (0) ; 0 (0) ; 16384 ; 0 ; 0 ; 0 ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_dmem:\neorv32_int_dmem_inst_true:neorv32_int_dmem_inst|altsyncram:mem_ram_b1_rtl_0 ; altsyncram ; work ; ; |altsyncram_c6q1:auto_generated| ; 0 (0) ; 0 (0) ; 16384 ; 0 ; 0 ; 0 ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_dmem:\neorv32_int_dmem_inst_true:neorv32_int_dmem_inst|altsyncram:mem_ram_b1_rtl_0|altsyncram_c6q1:auto_generated ; altsyncram_c6q1 ; work ; ; |altsyncram:mem_ram_b2_rtl_0| ; 0 (0) ; 0 (0) ; 16384 ; 0 ; 0 ; 0 ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_dmem:\neorv32_int_dmem_inst_true:neorv32_int_dmem_inst|altsyncram:mem_ram_b2_rtl_0 ; altsyncram ; work ; ; |altsyncram_c6q1:auto_generated| ; 0 (0) ; 0 (0) ; 16384 ; 0 ; 0 ; 0 ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_dmem:\neorv32_int_dmem_inst_true:neorv32_int_dmem_inst|altsyncram:mem_ram_b2_rtl_0|altsyncram_c6q1:auto_generated ; altsyncram_c6q1 ; work ; ; |altsyncram:mem_ram_b3_rtl_0| ; 0 (0) ; 0 (0) ; 16384 ; 0 ; 0 ; 0 ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_dmem:\neorv32_int_dmem_inst_true:neorv32_int_dmem_inst|altsyncram:mem_ram_b3_rtl_0 ; altsyncram ; work ; ; |altsyncram_c6q1:auto_generated| ; 0 (0) ; 0 (0) ; 16384 ; 0 ; 0 ; 0 ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_dmem:\neorv32_int_dmem_inst_true:neorv32_int_dmem_inst|altsyncram:mem_ram_b3_rtl_0|altsyncram_c6q1:auto_generated ; altsyncram_c6q1 ; work ; ; |neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst| ; 68 (68) ; 98 (98) ; 0 ; 0 ; 0 ; 0 ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst ; neorv32_gpio ; neorv32 ; ; |neorv32_imem:\neorv32_int_imem_inst_true:neorv32_int_imem_inst| ; 223 (223) ; 33 (33) ; 0 ; 0 ; 0 ; 0 ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_imem:\neorv32_int_imem_inst_true:neorv32_int_imem_inst ; neorv32_imem ; neorv32 ; ; |neorv32_mtime:\neorv32_mtime_inst_true:neorv32_mtime_inst| ; 205 (205) ; 166 (166) ; 0 ; 0 ; 0 ; 0 ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_mtime:\neorv32_mtime_inst_true:neorv32_mtime_inst ; neorv32_mtime ; neorv32 ; ; |neorv32_sysinfo:neorv32_sysinfo_inst| ; 11 (11) ; 8 (8) ; 0 ; 0 ; 0 ; 0 ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_sysinfo:neorv32_sysinfo_inst ; neorv32_sysinfo ; neorv32 ; +----------------------------------------------------------------------------------------------------------+---------------------+---------------------------+-------------------+------------+------+--------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------------+--------------+ Note: For table entries with two numbers listed, the numbers in parentheses indicate the number of resources of the given type used by the specific entity alone. The numbers listed outside of parentheses indicate the total resources of the given type used by the specific entity and all of its sub-entities in the hierarchy. +-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Analysis & Synthesis RAM Summary ; +--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------+------------------+--------------+--------------+--------------+--------------+-------+------+ ; Name ; Type ; Mode ; Port A Depth ; Port A Width ; Port B Depth ; Port B Width ; Size ; MIF ; +--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------+------------------+--------------+--------------+--------------+--------------+-------+------+ ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_regfile:neorv32_cpu_regfile_inst|altsyncram:reg_file[0][31]__1|altsyncram_u2n1:auto_generated|ALTSYNCRAM ; AUTO ; Simple Dual Port ; 32 ; 32 ; 32 ; 32 ; 1024 ; None ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_regfile:neorv32_cpu_regfile_inst|altsyncram:reg_file[0][31]__2|altsyncram_u2n1:auto_generated|ALTSYNCRAM ; AUTO ; Simple Dual Port ; 32 ; 32 ; 32 ; 32 ; 1024 ; None ; ; neorv32_top:neorv32_top_inst|neorv32_dmem:\neorv32_int_dmem_inst_true:neorv32_int_dmem_inst|altsyncram:mem_ram_b0_rtl_0|altsyncram_c6q1:auto_generated|ALTSYNCRAM ; AUTO ; Simple Dual Port ; 2048 ; 8 ; 2048 ; 8 ; 16384 ; None ; ; neorv32_top:neorv32_top_inst|neorv32_dmem:\neorv32_int_dmem_inst_true:neorv32_int_dmem_inst|altsyncram:mem_ram_b1_rtl_0|altsyncram_c6q1:auto_generated|ALTSYNCRAM ; AUTO ; Simple Dual Port ; 2048 ; 8 ; 2048 ; 8 ; 16384 ; None ; ; neorv32_top:neorv32_top_inst|neorv32_dmem:\neorv32_int_dmem_inst_true:neorv32_int_dmem_inst|altsyncram:mem_ram_b2_rtl_0|altsyncram_c6q1:auto_generated|ALTSYNCRAM ; AUTO ; Simple Dual Port ; 2048 ; 8 ; 2048 ; 8 ; 16384 ; None ; ; neorv32_top:neorv32_top_inst|neorv32_dmem:\neorv32_int_dmem_inst_true:neorv32_int_dmem_inst|altsyncram:mem_ram_b3_rtl_0|altsyncram_c6q1:auto_generated|ALTSYNCRAM ; AUTO ; Simple Dual Port ; 2048 ; 8 ; 2048 ; 8 ; 16384 ; None ; +--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------+------------------+--------------+--------------+--------------+--------------+-------+------+ Encoding Type: One-Hot +---------------------------------------------------------------------------------------------------------------------------------------------+ ; State Machine - |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_busswitch:neorv32_busswitch_inst|arbiter.state ; +------------------------+------------------------+----------------------+------------------------+----------------------+--------------------+ ; Name ; arbiter.state.B_RETIRE ; arbiter.state.B_BUSY ; arbiter.state.A_RETIRE ; arbiter.state.A_BUSY ; arbiter.state.IDLE ; +------------------------+------------------------+----------------------+------------------------+----------------------+--------------------+ ; arbiter.state.IDLE ; 0 ; 0 ; 0 ; 0 ; 0 ; ; arbiter.state.A_BUSY ; 0 ; 0 ; 0 ; 1 ; 1 ; ; arbiter.state.A_RETIRE ; 0 ; 0 ; 1 ; 0 ; 1 ; ; arbiter.state.B_BUSY ; 0 ; 1 ; 0 ; 0 ; 1 ; ; arbiter.state.B_RETIRE ; 1 ; 0 ; 0 ; 0 ; 1 ; +------------------------+------------------------+----------------------+------------------------+----------------------+--------------------+ Encoding Type: One-Hot +----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; State Machine - |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_alu:neorv32_cpu_alu_inst|neorv32_cpu_cp_muldiv:\neorv32_cpu_cp_muldiv_inst_true:neorv32_cpu_cp_muldiv_inst|ctrl.state ; +-------------------+-------------------+-------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Name ; ctrl.state.S_DONE ; ctrl.state.S_BUSY ; ctrl.state.S_IDLE ; +-------------------+-------------------+-------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; ctrl.state.S_IDLE ; 0 ; 0 ; 0 ; ; ctrl.state.S_BUSY ; 0 ; 1 ; 1 ; ; ctrl.state.S_DONE ; 1 ; 0 ; 1 ; +-------------------+-------------------+-------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ Encoding Type: One-Hot +--------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; State Machine - |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|debug_ctrl.state ; +--------------------------------+--------------------------------+-------------------------------+------------------------------------------------------------------+ ; Name ; debug_ctrl.state.DEBUG_LEAVING ; debug_ctrl.state.DEBUG_ONLINE ; debug_ctrl.state.DEBUG_OFFLINE ; +--------------------------------+--------------------------------+-------------------------------+------------------------------------------------------------------+ ; debug_ctrl.state.DEBUG_OFFLINE ; 0 ; 0 ; 0 ; ; debug_ctrl.state.DEBUG_ONLINE ; 0 ; 1 ; 1 ; ; debug_ctrl.state.DEBUG_LEAVING ; 1 ; 0 ; 1 ; +--------------------------------+--------------------------------+-------------------------------+------------------------------------------------------------------+ Encoding Type: One-Hot +----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; State Machine - |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|execute_engine.state_prev2 ; +-----------------------------------------+-------------------------------------+------------------------------------+-----------------------------------+-----------------------------------+-------------------------------------+------------------------------------+-----------------------------------------+--------------------------------------+---------------------------------------+-------------------------------------+-------------------------------------+ ; Name ; execute_engine.state_prev2.MEM_WAIT ; execute_engine.state_prev2.MEM_REQ ; execute_engine.state_prev2.SYSTEM ; execute_engine.state_prev2.BRANCH ; execute_engine.state_prev2.ALU_WAIT ; execute_engine.state_prev2.EXECUTE ; execute_engine.state_prev2.TRAP_EXECUTE ; execute_engine.state_prev2.TRAP_EXIT ; execute_engine.state_prev2.TRAP_ENTER ; execute_engine.state_prev2.DISPATCH ; execute_engine.state_prev2.BRANCHED ; +-----------------------------------------+-------------------------------------+------------------------------------+-----------------------------------+-----------------------------------+-------------------------------------+------------------------------------+-----------------------------------------+--------------------------------------+---------------------------------------+-------------------------------------+-------------------------------------+ ; execute_engine.state_prev2.BRANCHED ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; ; execute_engine.state_prev2.DISPATCH ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 1 ; ; execute_engine.state_prev2.TRAP_ENTER ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 1 ; ; execute_engine.state_prev2.TRAP_EXIT ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 1 ; ; execute_engine.state_prev2.TRAP_EXECUTE ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 1 ; ; execute_engine.state_prev2.EXECUTE ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 1 ; ; execute_engine.state_prev2.ALU_WAIT ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; ; execute_engine.state_prev2.BRANCH ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; ; execute_engine.state_prev2.SYSTEM ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; ; execute_engine.state_prev2.MEM_REQ ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; ; execute_engine.state_prev2.MEM_WAIT ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; +-----------------------------------------+-------------------------------------+------------------------------------+-----------------------------------+-----------------------------------+-------------------------------------+------------------------------------+-----------------------------------------+--------------------------------------+---------------------------------------+-------------------------------------+-------------------------------------+ Encoding Type: One-Hot +----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; State Machine - |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|execute_engine.state_prev ; +----------------------------------------+------------------------------------+-----------------------------------+----------------------------------+----------------------------------+------------------------------------+-----------------------------------+----------------------------------------+-------------------------------------+--------------------------------------+------------------------------------+------------------------------------+ ; Name ; execute_engine.state_prev.MEM_WAIT ; execute_engine.state_prev.MEM_REQ ; execute_engine.state_prev.SYSTEM ; execute_engine.state_prev.BRANCH ; execute_engine.state_prev.ALU_WAIT ; execute_engine.state_prev.EXECUTE ; execute_engine.state_prev.TRAP_EXECUTE ; execute_engine.state_prev.TRAP_EXIT ; execute_engine.state_prev.TRAP_ENTER ; execute_engine.state_prev.DISPATCH ; execute_engine.state_prev.BRANCHED ; +----------------------------------------+------------------------------------+-----------------------------------+----------------------------------+----------------------------------+------------------------------------+-----------------------------------+----------------------------------------+-------------------------------------+--------------------------------------+------------------------------------+------------------------------------+ ; execute_engine.state_prev.BRANCHED ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; ; execute_engine.state_prev.DISPATCH ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 1 ; ; execute_engine.state_prev.TRAP_ENTER ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 1 ; ; execute_engine.state_prev.TRAP_EXIT ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 1 ; ; execute_engine.state_prev.TRAP_EXECUTE ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 1 ; ; execute_engine.state_prev.EXECUTE ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 1 ; ; execute_engine.state_prev.ALU_WAIT ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; ; execute_engine.state_prev.BRANCH ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; ; execute_engine.state_prev.SYSTEM ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; ; execute_engine.state_prev.MEM_REQ ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; ; execute_engine.state_prev.MEM_WAIT ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; +----------------------------------------+------------------------------------+-----------------------------------+----------------------------------+----------------------------------+------------------------------------+-----------------------------------+----------------------------------------+-------------------------------------+--------------------------------------+------------------------------------+------------------------------------+ Encoding Type: One-Hot +----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; State Machine - |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|execute_engine.state ; +-----------------------------------+-------------------------------+------------------------------+-----------------------------+-----------------------------+-------------------------------+------------------------------+-----------------------------------+--------------------------------+---------------------------------+-------------------------------+-------------------------------+ ; Name ; execute_engine.state.MEM_WAIT ; execute_engine.state.MEM_REQ ; execute_engine.state.SYSTEM ; execute_engine.state.BRANCH ; execute_engine.state.ALU_WAIT ; execute_engine.state.EXECUTE ; execute_engine.state.TRAP_EXECUTE ; execute_engine.state.TRAP_EXIT ; execute_engine.state.TRAP_ENTER ; execute_engine.state.DISPATCH ; execute_engine.state.BRANCHED ; +-----------------------------------+-------------------------------+------------------------------+-----------------------------+-----------------------------+-------------------------------+------------------------------+-----------------------------------+--------------------------------+---------------------------------+-------------------------------+-------------------------------+ ; execute_engine.state.BRANCHED ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; ; execute_engine.state.DISPATCH ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 1 ; ; execute_engine.state.TRAP_ENTER ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 1 ; ; execute_engine.state.TRAP_EXIT ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 1 ; ; execute_engine.state.TRAP_EXECUTE ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 1 ; ; execute_engine.state.EXECUTE ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 1 ; ; execute_engine.state.ALU_WAIT ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; ; execute_engine.state.BRANCH ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; ; execute_engine.state.SYSTEM ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; ; execute_engine.state.MEM_REQ ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; ; execute_engine.state.MEM_WAIT ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; +-----------------------------------+-------------------------------+------------------------------+-----------------------------+-----------------------------+-------------------------------+------------------------------+-----------------------------------+--------------------------------+---------------------------------+-------------------------------+-------------------------------+ Encoding Type: One-Hot +-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; State Machine - |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|fetch_engine.state_prev ; +------------------------------------+---------------------------------+------------------------------------+------------------------------------+------------------------------------+ ; Name ; fetch_engine.state_prev.IF_WAIT ; fetch_engine.state_prev.IF_PENDING ; fetch_engine.state_prev.IF_REQUEST ; fetch_engine.state_prev.IF_RESTART ; +------------------------------------+---------------------------------+------------------------------------+------------------------------------+------------------------------------+ ; fetch_engine.state_prev.IF_RESTART ; 0 ; 0 ; 0 ; 0 ; ; fetch_engine.state_prev.IF_REQUEST ; 0 ; 0 ; 1 ; 1 ; ; fetch_engine.state_prev.IF_PENDING ; 0 ; 1 ; 0 ; 1 ; ; fetch_engine.state_prev.IF_WAIT ; 1 ; 0 ; 0 ; 1 ; +------------------------------------+---------------------------------+------------------------------------+------------------------------------+------------------------------------+ Encoding Type: One-Hot +----------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; State Machine - |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|fetch_engine.state ; +-------------------------------+----------------------------+-------------------------------+-------------------------------+-----------------------------------------+ ; Name ; fetch_engine.state.IF_WAIT ; fetch_engine.state.IF_PENDING ; fetch_engine.state.IF_REQUEST ; fetch_engine.state.IF_RESTART ; +-------------------------------+----------------------------+-------------------------------+-------------------------------+-----------------------------------------+ ; fetch_engine.state.IF_RESTART ; 0 ; 0 ; 0 ; 0 ; ; fetch_engine.state.IF_REQUEST ; 0 ; 0 ; 1 ; 1 ; ; fetch_engine.state.IF_PENDING ; 0 ; 1 ; 0 ; 1 ; ; fetch_engine.state.IF_WAIT ; 1 ; 0 ; 0 ; 1 ; +-------------------------------+----------------------------+-------------------------------+-------------------------------+-----------------------------------------+ +---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Registers Removed During Synthesis ; +------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------+ ; Register name ; Reason for Removal ; +------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------+ ; neorv32_top:neorv32_top_inst|neorv32_sysinfo:neorv32_sysinfo_inst|data_o[0,1,4..6,8..11,18,24,26..30] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_bus_keeper:neorv32_bus_keeper_inst|data_o[1..30] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_busswitch:neorv32_busswitch_inst|cb_wr_req_buf ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_bus:neorv32_cpu_bus_inst|arbiter.pmp_r_err ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_bus:neorv32_cpu_bus_inst|arbiter.pmp_w_err ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|execute_engine.pc[0] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|trap_ctrl.exc_buf[10,11] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|trap_ctrl.irq_pnd[0,2] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|trap_ctrl.irq_buf[19,20] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|csr.mstatus_mprv ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|csr.mstatus_tw ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|csr.dcsr_step ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|trap_ctrl.cause[5] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_bus_keeper:neorv32_bus_keeper_inst|control.ignore ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_sysinfo:neorv32_sysinfo_inst|data_o[7,12,15,19..23] ; Merged with neorv32_top:neorv32_top_inst|neorv32_sysinfo:neorv32_sysinfo_inst|data_o[25] ; ; neorv32_top:neorv32_top_inst|neorv32_sysinfo:neorv32_sysinfo_inst|data_o[2,3] ; Merged with neorv32_top:neorv32_top_inst|neorv32_sysinfo:neorv32_sysinfo_inst|data_o[16] ; ; neorv32_top:neorv32_top_inst|neorv32_imem:\neorv32_int_imem_inst_true:neorv32_int_imem_inst|mem_rom_rd[0] ; Merged with neorv32_top:neorv32_top_inst|neorv32_imem:\neorv32_int_imem_inst_true:neorv32_int_imem_inst|mem_rom_rd[1] ; ; neorv32_top:neorv32_top_inst|neorv32_imem:\neorv32_int_imem_inst_true:neorv32_int_imem_inst|ack_o ; Merged with neorv32_top:neorv32_top_inst|neorv32_imem:\neorv32_int_imem_inst_true:neorv32_int_imem_inst|rden ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|trap_ctrl.irq_buf[0] ; Merged with neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|trap_ctrl.irq_buf[2] ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|csr.mip_firq_nclr[0..15] ; Lost fanout ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|trap_ctrl.exc_buf[2] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|trap_ctrl.irq_pnd[3..18] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|trap_ctrl.irq_buf[2..18] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|trap_ctrl.cause[4] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|csr.privilege ; Stuck at VCC due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|trap_ctrl.exc_buf[4] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst|din_hi[1] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst|din_lo[1] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst|din_hi[0] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst|din_lo[0] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst|din_hi[17] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst|din_lo[17] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst|din_hi[16] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst|din_lo[16] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst|din_hi[27] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst|din_lo[27] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst|din_hi[11] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst|din_lo[11] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst|din_hi[26] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst|din_lo[26] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst|din_hi[10] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst|din_lo[10] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst|din_hi[25] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst|din_lo[25] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst|din_hi[9] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst|din_lo[9] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst|din_hi[24] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst|din_lo[24] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst|din_hi[8] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst|din_lo[8] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst|din_hi[23] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst|din_lo[23] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst|din_hi[7] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst|din_lo[7] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst|din_hi[31] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst|din_lo[31] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst|din_hi[15] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst|din_lo[15] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst|din_hi[30] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst|din_lo[30] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst|din_hi[14] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst|din_lo[14] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst|din_hi[29] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst|din_lo[29] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst|din_hi[13] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst|din_lo[13] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst|din_hi[22] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst|din_lo[22] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst|din_hi[6] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst|din_lo[6] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst|din_hi[21] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst|din_lo[21] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst|din_hi[5] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst|din_lo[5] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst|din_hi[20] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst|din_lo[20] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst|din_hi[4] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst|din_lo[4] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst|din_hi[19] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst|din_lo[19] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst|din_hi[3] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst|din_lo[3] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst|din_hi[18] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst|din_lo[18] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst|din_hi[2] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst|din_lo[2] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst|din_hi[28] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst|din_lo[28] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst|din_hi[12] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst|din_lo[12] ; Stuck at GND due to stuck port data_in ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|execute_engine.i_reg[0] ; Merged with neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|execute_engine.i_reg[1] ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|debug_ctrl.state.DEBUG_OFFLINE ; Lost fanout ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|debug_ctrl.state.DEBUG_ONLINE ; Lost fanout ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|debug_ctrl.state.DEBUG_LEAVING ; Lost fanout ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|execute_engine.state_prev2.BRANCHED ; Lost fanout ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|execute_engine.state_prev.BRANCHED ; Lost fanout ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|execute_engine.state_prev2.DISPATCH ; Lost fanout ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|execute_engine.state_prev.DISPATCH ; Lost fanout ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|execute_engine.state_prev2.TRAP_ENTER ; Lost fanout ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|execute_engine.state_prev.TRAP_ENTER ; Lost fanout ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|execute_engine.state_prev2.TRAP_EXIT ; Lost fanout ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|execute_engine.state_prev.TRAP_EXIT ; Lost fanout ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|execute_engine.state_prev2.TRAP_EXECUTE ; Lost fanout ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|execute_engine.state_prev.TRAP_EXECUTE ; Lost fanout ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|execute_engine.state_prev2.EXECUTE ; Lost fanout ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|execute_engine.state_prev.EXECUTE ; Lost fanout ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|execute_engine.state_prev2.ALU_WAIT ; Lost fanout ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|execute_engine.state_prev.ALU_WAIT ; Lost fanout ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|execute_engine.state_prev2.BRANCH ; Lost fanout ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|execute_engine.state_prev.BRANCH ; Lost fanout ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|execute_engine.state_prev2.SYSTEM ; Lost fanout ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|execute_engine.state_prev.SYSTEM ; Lost fanout ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|execute_engine.state_prev2.MEM_REQ ; Lost fanout ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|execute_engine.state_prev.MEM_REQ ; Lost fanout ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|execute_engine.state_prev2.MEM_WAIT ; Lost fanout ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|execute_engine.state_prev.MEM_WAIT ; Lost fanout ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|fetch_engine.state_prev.IF_RESTART ; Lost fanout ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|fetch_engine.state_prev.IF_REQUEST ; Lost fanout ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|fetch_engine.state_prev.IF_PENDING ; Lost fanout ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|fetch_engine.state_prev.IF_WAIT ; Lost fanout ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|execute_engine.state.MEM_REQ ; Merged with neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|ctrl[39] ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|fetch_engine.pmp_err ; Stuck at GND due to stuck port data_in ; ; Total Number of Removed Registers = 223 ; ; +------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------+ +----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Removed Registers Triggering Further Register Optimizations ; +------------------------------------------------------------------------------------------------------------------------------------------------+---------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------+ ; Register name ; Reason for Removal ; Registers Removed due to This Register ; +------------------------------------------------------------------------------------------------------------------------------------------------+---------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------+ ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|trap_ctrl.irq_pnd[5] ; Stuck at GND ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|trap_ctrl.irq_buf[5] ; ; ; due to stuck port data_in ; ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|execute_engine.state_prev2.MEM_WAIT ; Lost Fanouts ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|execute_engine.state_prev.MEM_WAIT ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|execute_engine.state_prev2.MEM_REQ ; Lost Fanouts ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|execute_engine.state_prev.MEM_REQ ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|execute_engine.state_prev2.SYSTEM ; Lost Fanouts ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|execute_engine.state_prev.SYSTEM ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|execute_engine.state_prev2.BRANCH ; Lost Fanouts ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|execute_engine.state_prev.BRANCH ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|execute_engine.state_prev2.ALU_WAIT ; Lost Fanouts ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|execute_engine.state_prev.ALU_WAIT ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|execute_engine.state_prev2.EXECUTE ; Lost Fanouts ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|execute_engine.state_prev.EXECUTE ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|execute_engine.state_prev2.TRAP_EXECUTE ; Lost Fanouts ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|execute_engine.state_prev.TRAP_EXECUTE ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|execute_engine.state_prev2.TRAP_EXIT ; Lost Fanouts ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|execute_engine.state_prev.TRAP_EXIT ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|execute_engine.state_prev2.TRAP_ENTER ; Lost Fanouts ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|execute_engine.state_prev.TRAP_ENTER ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|execute_engine.state_prev2.DISPATCH ; Lost Fanouts ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|execute_engine.state_prev.DISPATCH ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|execute_engine.state_prev2.BRANCHED ; Lost Fanouts ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|execute_engine.state_prev.BRANCHED ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|csr.privilege ; Stuck at VCC ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|trap_ctrl.exc_buf[4] ; ; ; due to stuck port data_in ; ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|trap_ctrl.irq_pnd[3] ; Stuck at GND ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|trap_ctrl.irq_buf[3] ; ; ; due to stuck port data_in ; ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|trap_ctrl.irq_pnd[4] ; Stuck at GND ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|trap_ctrl.irq_buf[4] ; ; ; due to stuck port data_in ; ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|trap_ctrl.irq_pnd[2] ; Stuck at GND ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|trap_ctrl.irq_buf[2] ; ; ; due to stuck port data_in ; ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|trap_ctrl.irq_pnd[6] ; Stuck at GND ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|trap_ctrl.irq_buf[6] ; ; ; due to stuck port data_in ; ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|trap_ctrl.irq_pnd[7] ; Stuck at GND ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|trap_ctrl.irq_buf[7] ; ; ; due to stuck port data_in ; ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|trap_ctrl.irq_pnd[8] ; Stuck at GND ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|trap_ctrl.irq_buf[8] ; ; ; due to stuck port data_in ; ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|trap_ctrl.irq_pnd[9] ; Stuck at GND ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|trap_ctrl.irq_buf[9] ; ; ; due to stuck port data_in ; ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|trap_ctrl.irq_pnd[10] ; Stuck at GND ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|trap_ctrl.irq_buf[10] ; ; ; due to stuck port data_in ; ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|trap_ctrl.irq_pnd[11] ; Stuck at GND ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|trap_ctrl.irq_buf[11] ; ; ; due to stuck port data_in ; ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|trap_ctrl.irq_pnd[12] ; Stuck at GND ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|trap_ctrl.irq_buf[12] ; ; ; due to stuck port data_in ; ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|trap_ctrl.irq_pnd[13] ; Stuck at GND ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|trap_ctrl.irq_buf[13] ; ; ; due to stuck port data_in ; ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|trap_ctrl.irq_pnd[14] ; Stuck at GND ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|trap_ctrl.irq_buf[14] ; ; ; due to stuck port data_in ; ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|trap_ctrl.irq_pnd[15] ; Stuck at GND ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|trap_ctrl.irq_buf[15] ; ; ; due to stuck port data_in ; ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|trap_ctrl.irq_pnd[16] ; Stuck at GND ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|trap_ctrl.irq_buf[16] ; ; ; due to stuck port data_in ; ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|trap_ctrl.irq_pnd[17] ; Stuck at GND ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|trap_ctrl.irq_buf[17] ; ; ; due to stuck port data_in ; ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|trap_ctrl.irq_pnd[18] ; Stuck at GND ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|trap_ctrl.irq_buf[18] ; ; ; due to stuck port data_in ; ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|trap_ctrl.exc_buf[2] ; Stuck at GND ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|trap_ctrl.cause[4] ; ; ; due to stuck port data_in ; ; +------------------------------------------------------------------------------------------------------------------------------------------------+---------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------+ +------------------------------------------------------+ ; General Register Statistics ; +----------------------------------------------+-------+ ; Statistic ; Value ; +----------------------------------------------+-------+ ; Total registers ; 1315 ; ; Number of registers using Synchronous Clear ; 11 ; ; Number of registers using Synchronous Load ; 332 ; ; Number of registers using Asynchronous Clear ; 832 ; ; Number of registers using Asynchronous Load ; 0 ; ; Number of registers using Clock Enable ; 703 ; ; Number of registers using Preset ; 0 ; +----------------------------------------------+-------+ +------------------------------------------------------------------------------------------------------------------------------------------+ ; Inverted Register Statistics ; +--------------------------------------------------------------------------------------------------------------------------------+---------+ ; Inverted Register ; Fan out ; +--------------------------------------------------------------------------------------------------------------------------------+---------+ ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|fetch_engine.restart ; 10 ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|execute_engine.branched ; 2 ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|csr.mscratch[19] ; 1 ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|csr.mscratch[23] ; 1 ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|csr.mscratch[24] ; 1 ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|csr.mscratch[27] ; 1 ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|csr.mscratch[28] ; 1 ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|csr.mscratch[8] ; 1 ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|csr.mscratch[9] ; 1 ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|csr.mscratch[10] ; 1 ; ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|csr.mscratch[2] ; 1 ; ; Total number of inverted registers = 11 ; ; +--------------------------------------------------------------------------------------------------------------------------------+---------+ +---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Registers Packed Into Inferred Megafunctions ; +-----------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------+------+ ; Register Name ; Megafunction ; Type ; +-----------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------+------+ ; neorv32_top:neorv32_top_inst|neorv32_dmem:\neorv32_int_dmem_inst_true:neorv32_int_dmem_inst|mem_ram_b0_rd[0..7] ; neorv32_top:neorv32_top_inst|neorv32_dmem:\neorv32_int_dmem_inst_true:neorv32_int_dmem_inst|mem_ram_b0_rtl_0 ; RAM ; ; neorv32_top:neorv32_top_inst|neorv32_dmem:\neorv32_int_dmem_inst_true:neorv32_int_dmem_inst|mem_ram_b1_rd[0..7] ; neorv32_top:neorv32_top_inst|neorv32_dmem:\neorv32_int_dmem_inst_true:neorv32_int_dmem_inst|mem_ram_b1_rtl_0 ; RAM ; ; neorv32_top:neorv32_top_inst|neorv32_dmem:\neorv32_int_dmem_inst_true:neorv32_int_dmem_inst|mem_ram_b2_rd[0..7] ; neorv32_top:neorv32_top_inst|neorv32_dmem:\neorv32_int_dmem_inst_true:neorv32_int_dmem_inst|mem_ram_b2_rtl_0 ; RAM ; ; neorv32_top:neorv32_top_inst|neorv32_dmem:\neorv32_int_dmem_inst_true:neorv32_int_dmem_inst|mem_ram_b3_rd[0..7] ; neorv32_top:neorv32_top_inst|neorv32_dmem:\neorv32_int_dmem_inst_true:neorv32_int_dmem_inst|mem_ram_b3_rtl_0 ; RAM ; +-----------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------+------+ +---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Multiplexer Restructuring Statistics (No Restructuring Performed) ; +--------------------+-----------+---------------+----------------------+------------------------+------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Multiplexer Inputs ; Bus Width ; Baseline Area ; Area if Restructured ; Saving if Restructured ; Registered ; Example Multiplexer Output ; +--------------------+-----------+---------------+----------------------+------------------------+------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; 4:1 ; 4 bits ; 8 LEs ; 8 LEs ; 0 LEs ; Yes ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_bus:neorv32_cpu_bus_inst|d_bus_ben_o[0] ; ; 4:1 ; 25 bits ; 50 LEs ; 50 LEs ; 0 LEs ; Yes ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_bus:neorv32_cpu_bus_inst|rdata_o[18] ; ; 3:1 ; 2 bits ; 4 LEs ; 2 LEs ; 2 LEs ; Yes ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|neorv32_fifo:\prefetch_buffer:0:prefetch_buffer_inst|fifo.w_pnt[1] ; ; 3:1 ; 2 bits ; 4 LEs ; 2 LEs ; 2 LEs ; Yes ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|neorv32_fifo:\prefetch_buffer:0:prefetch_buffer_inst|fifo.r_pnt[0] ; ; 3:1 ; 2 bits ; 4 LEs ; 2 LEs ; 2 LEs ; Yes ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|neorv32_fifo:\prefetch_buffer:1:prefetch_buffer_inst|fifo.w_pnt[0] ; ; 3:1 ; 2 bits ; 4 LEs ; 2 LEs ; 2 LEs ; Yes ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|neorv32_fifo:\prefetch_buffer:1:prefetch_buffer_inst|fifo.r_pnt[1] ; ; 3:1 ; 3 bits ; 6 LEs ; 3 LEs ; 3 LEs ; Yes ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_bus_keeper:neorv32_bus_keeper_inst|control.timeout[1] ; ; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_alu:neorv32_cpu_alu_inst|neorv32_cpu_cp_shifter:neorv32_cpu_cp_shifter_inst|shifter.cnt[1] ; ; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|csr.mcause[5] ; ; 3:1 ; 32 bits ; 64 LEs ; 0 LEs ; 64 LEs ; Yes ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|csr.minstret[13] ; ; 3:1 ; 31 bits ; 62 LEs ; 0 LEs ; 62 LEs ; Yes ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_alu:neorv32_cpu_alu_inst|neorv32_cpu_cp_muldiv:\neorv32_cpu_cp_muldiv_inst_true:neorv32_cpu_cp_muldiv_inst|mul.prod[7] ; ; 3:1 ; 32 bits ; 64 LEs ; 0 LEs ; 64 LEs ; Yes ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|csr.mcycle[13] ; ; 3:1 ; 4 bits ; 8 LEs ; 4 LEs ; 4 LEs ; Yes ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_alu:neorv32_cpu_alu_inst|neorv32_cpu_cp_muldiv:\neorv32_cpu_cp_muldiv_inst_true:neorv32_cpu_cp_muldiv_inst|ctrl.cnt[1] ; ; 5:1 ; 32 bits ; 96 LEs ; 64 LEs ; 32 LEs ; Yes ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst|data_o[31] ; ; 5:1 ; 32 bits ; 96 LEs ; 64 LEs ; 32 LEs ; Yes ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_mtime:\neorv32_mtime_inst_true:neorv32_mtime_inst|data_o[23] ; ; 4:1 ; 32 bits ; 64 LEs ; 32 LEs ; 32 LEs ; Yes ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_alu:neorv32_cpu_alu_inst|neorv32_cpu_cp_muldiv:\neorv32_cpu_cp_muldiv_inst_true:neorv32_cpu_cp_muldiv_inst|mul.prod[48] ; ; 4:1 ; 31 bits ; 62 LEs ; 62 LEs ; 0 LEs ; Yes ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|csr.mepc[12] ; ; 4:1 ; 2 bits ; 4 LEs ; 4 LEs ; 0 LEs ; Yes ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|cnt_csr_we.cycle[0] ; ; 4:1 ; 2 bits ; 4 LEs ; 4 LEs ; 0 LEs ; Yes ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|cnt_csr_we.instret[1] ; ; 4:1 ; 32 bits ; 64 LEs ; 64 LEs ; 0 LEs ; Yes ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_alu:neorv32_cpu_alu_inst|neorv32_cpu_cp_muldiv:\neorv32_cpu_cp_muldiv_inst_true:neorv32_cpu_cp_muldiv_inst|div.quotient[11] ; ; 4:1 ; 2 bits ; 4 LEs ; 4 LEs ; 0 LEs ; Yes ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|execute_engine.i_reg[1] ; ; 4:1 ; 31 bits ; 62 LEs ; 62 LEs ; 0 LEs ; Yes ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_alu:neorv32_cpu_alu_inst|neorv32_cpu_cp_shifter:neorv32_cpu_cp_shifter_inst|shifter.sreg[27] ; ; 4:1 ; 32 bits ; 64 LEs ; 0 LEs ; 64 LEs ; Yes ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_alu:neorv32_cpu_alu_inst|neorv32_cpu_cp_muldiv:\neorv32_cpu_cp_muldiv_inst_true:neorv32_cpu_cp_muldiv_inst|div.remainder[15] ; ; 5:1 ; 8 bits ; 24 LEs ; 16 LEs ; 8 LEs ; Yes ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_bus:neorv32_cpu_bus_inst|rdata_o[14] ; ; 4:1 ; 30 bits ; 60 LEs ; 0 LEs ; 60 LEs ; Yes ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|fetch_engine.pc[17] ; ; 4:1 ; 30 bits ; 60 LEs ; 60 LEs ; 0 LEs ; Yes ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|execute_engine.next_pc[9] ; ; 32:1 ; 4 bits ; 84 LEs ; 8 LEs ; 76 LEs ; Yes ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|imm_o[1] ; ; 32:1 ; 8 bits ; 168 LEs ; 0 LEs ; 168 LEs ; Yes ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|imm_o[16] ; ; 8:1 ; 7 bits ; 35 LEs ; 14 LEs ; 21 LEs ; Yes ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_bus:neorv32_cpu_bus_inst|rdata_o[2] ; ; 18:1 ; 31 bits ; 372 LEs ; 62 LEs ; 310 LEs ; Yes ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|csr.mtval[31] ; ; 9:1 ; 2 bits ; 12 LEs ; 12 LEs ; 0 LEs ; Yes ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|trap_ctrl.cause[1] ; ; 9:1 ; 7 bits ; 42 LEs ; 42 LEs ; 0 LEs ; Yes ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|csr.rdata[9] ; ; 11:1 ; 10 bits ; 70 LEs ; 70 LEs ; 0 LEs ; Yes ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|csr.rdata[25] ; ; 12:1 ; 2 bits ; 16 LEs ; 16 LEs ; 0 LEs ; Yes ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|csr.rdata[19] ; ; 12:1 ; 2 bits ; 16 LEs ; 16 LEs ; 0 LEs ; Yes ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|csr.rdata[23] ; ; 20:1 ; 2 bits ; 26 LEs ; 12 LEs ; 14 LEs ; Yes ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|execute_engine.i_reg[16] ; ; 20:1 ; 2 bits ; 26 LEs ; 8 LEs ; 18 LEs ; Yes ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|execute_engine.i_reg[10] ; ; 4:1 ; 32 bits ; 64 LEs ; 64 LEs ; 0 LEs ; No ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|Mux66 ; ; 3:1 ; 2 bits ; 4 LEs ; 4 LEs ; 0 LEs ; No ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|trap_ctrl.break_point ; ; 3:1 ; 5 bits ; 10 LEs ; 10 LEs ; 0 LEs ; No ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_regfile:neorv32_cpu_regfile_inst|opa_addr[0] ; ; 11:1 ; 31 bits ; 217 LEs ; 186 LEs ; 31 LEs ; No ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_regfile:neorv32_cpu_regfile_inst|Mux17 ; ; 7:1 ; 32 bits ; 128 LEs ; 96 LEs ; 32 LEs ; No ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_alu:neorv32_cpu_alu_inst|neorv32_cpu_cp_muldiv:\neorv32_cpu_cp_muldiv_inst_true:neorv32_cpu_cp_muldiv_inst|res_o[12] ; ; 9:1 ; 2 bits ; 12 LEs ; 8 LEs ; 4 LEs ; No ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_busswitch:neorv32_busswitch_inst|Selector1 ; ; 10:1 ; 2 bits ; 12 LEs ; 10 LEs ; 2 LEs ; No ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_busswitch:neorv32_busswitch_inst|Selector2 ; ; 10:1 ; 2 bits ; 12 LEs ; 6 LEs ; 6 LEs ; No ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|Selector72 ; ; 11:1 ; 3 bits ; 21 LEs ; 9 LEs ; 12 LEs ; No ; |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|Selector76 ; +--------------------+-----------+---------------+----------------------+------------------------+------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ +--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Source assignments for neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_regfile:neorv32_cpu_regfile_inst|altsyncram:reg_file[0][31]__1|altsyncram_u2n1:auto_generated ; +---------------------------------+--------------------+------+------------------------------------------------------------------------------------------------------------------------------+ ; Assignment ; Value ; From ; To ; +---------------------------------+--------------------+------+------------------------------------------------------------------------------------------------------------------------------+ ; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; - ; - ; +---------------------------------+--------------------+------+------------------------------------------------------------------------------------------------------------------------------+ +--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Source assignments for neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_regfile:neorv32_cpu_regfile_inst|altsyncram:reg_file[0][31]__2|altsyncram_u2n1:auto_generated ; +---------------------------------+--------------------+------+------------------------------------------------------------------------------------------------------------------------------+ ; Assignment ; Value ; From ; To ; +---------------------------------+--------------------+------+------------------------------------------------------------------------------------------------------------------------------+ ; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; - ; - ; +---------------------------------+--------------------+------+------------------------------------------------------------------------------------------------------------------------------+ +-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Source assignments for neorv32_top:neorv32_top_inst|neorv32_dmem:\neorv32_int_dmem_inst_true:neorv32_int_dmem_inst|altsyncram:mem_ram_b0_rtl_0|altsyncram_c6q1:auto_generated ; +---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------+ ; Assignment ; Value ; From ; To ; +---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------+ ; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; - ; - ; +---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------+ +-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Source assignments for neorv32_top:neorv32_top_inst|neorv32_dmem:\neorv32_int_dmem_inst_true:neorv32_int_dmem_inst|altsyncram:mem_ram_b1_rtl_0|altsyncram_c6q1:auto_generated ; +---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------+ ; Assignment ; Value ; From ; To ; +---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------+ ; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; - ; - ; +---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------+ +-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Source assignments for neorv32_top:neorv32_top_inst|neorv32_dmem:\neorv32_int_dmem_inst_true:neorv32_int_dmem_inst|altsyncram:mem_ram_b2_rtl_0|altsyncram_c6q1:auto_generated ; +---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------+ ; Assignment ; Value ; From ; To ; +---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------+ ; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; - ; - ; +---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------+ +-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Source assignments for neorv32_top:neorv32_top_inst|neorv32_dmem:\neorv32_int_dmem_inst_true:neorv32_int_dmem_inst|altsyncram:mem_ram_b3_rtl_0|altsyncram_c6q1:auto_generated ; +---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------+ ; Assignment ; Value ; From ; To ; +---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------+ ; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; - ; - ; +---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------+ +-------------------------------------------------------------------------------------------+ ; Parameter Settings for User Entity Instance: Top-level Entity: |neorv32_test_setup_approm ; +-------------------+----------+------------------------------------------------------------+ ; Parameter Name ; Value ; Type ; +-------------------+----------+------------------------------------------------------------+ ; CLOCK_FREQUENCY ; 50000000 ; Signed Integer ; ; MEM_INT_IMEM_SIZE ; 16384 ; Signed Integer ; ; MEM_INT_DMEM_SIZE ; 8192 ; Signed Integer ; +-------------------+----------+------------------------------------------------------------+ Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off". +-----------------------------------------------------------------------------------+ ; Parameter Settings for User Entity Instance: neorv32_top:neorv32_top_inst ; +------------------------------+----------------------------------+-----------------+ ; Parameter Name ; Value ; Type ; +------------------------------+----------------------------------+-----------------+ ; clock_frequency ; 50000000 ; Signed Integer ; ; hw_thread_id ; 0 ; Signed Integer ; ; custom_id ; 00000000000000000000000000000000 ; Unsigned Binary ; ; int_bootloader_en ; false ; Enumerated ; ; on_chip_debugger_en ; false ; Enumerated ; ; cpu_extension_riscv_b ; false ; Enumerated ; ; cpu_extension_riscv_c ; true ; Enumerated ; ; cpu_extension_riscv_e ; false ; Enumerated ; ; cpu_extension_riscv_m ; true ; Enumerated ; ; cpu_extension_riscv_u ; false ; Enumerated ; ; cpu_extension_riscv_zfinx ; false ; Enumerated ; ; cpu_extension_riscv_zicsr ; true ; Enumerated ; ; cpu_extension_riscv_zicntr ; true ; Enumerated ; ; cpu_extension_riscv_zihpm ; false ; Enumerated ; ; cpu_extension_riscv_zifencei ; false ; Enumerated ; ; cpu_extension_riscv_zmmul ; false ; Enumerated ; ; cpu_extension_riscv_zxcfu ; false ; Enumerated ; ; fast_mul_en ; false ; Enumerated ; ; fast_shift_en ; false ; Enumerated ; ; cpu_ipb_entries ; 1 ; Signed Integer ; ; pmp_num_regions ; 0 ; Signed Integer ; ; pmp_min_granularity ; 4 ; Signed Integer ; ; hpm_num_cnts ; 0 ; Signed Integer ; ; hpm_cnt_width ; 40 ; Signed Integer ; ; mem_int_imem_en ; true ; Enumerated ; ; mem_int_imem_size ; 16384 ; Signed Integer ; ; mem_int_dmem_en ; true ; Enumerated ; ; mem_int_dmem_size ; 8192 ; Signed Integer ; ; icache_en ; false ; Enumerated ; ; icache_num_blocks ; 4 ; Signed Integer ; ; icache_block_size ; 64 ; Signed Integer ; ; icache_associativity ; 1 ; Signed Integer ; ; mem_ext_en ; false ; Enumerated ; ; mem_ext_timeout ; 255 ; Signed Integer ; ; mem_ext_pipe_mode ; false ; Enumerated ; ; mem_ext_big_endian ; false ; Enumerated ; ; mem_ext_async_rx ; false ; Enumerated ; ; mem_ext_async_tx ; false ; Enumerated ; ; slink_num_tx ; 0 ; Signed Integer ; ; slink_num_rx ; 0 ; Signed Integer ; ; slink_tx_fifo ; 1 ; Signed Integer ; ; slink_rx_fifo ; 1 ; Signed Integer ; ; xirq_num_ch ; 0 ; Signed Integer ; ; xirq_trigger_type ; 11111111111111111111111111111111 ; Unsigned Binary ; ; xirq_trigger_polarity ; 11111111111111111111111111111111 ; Unsigned Binary ; ; io_gpio_en ; true ; Enumerated ; ; io_mtime_en ; true ; Enumerated ; ; io_uart0_en ; false ; Enumerated ; ; io_uart0_rx_fifo ; 1 ; Signed Integer ; ; io_uart0_tx_fifo ; 1 ; Signed Integer ; ; io_uart1_en ; false ; Enumerated ; ; io_uart1_rx_fifo ; 1 ; Signed Integer ; ; io_uart1_tx_fifo ; 1 ; Signed Integer ; ; io_spi_en ; false ; Enumerated ; ; io_spi_fifo ; 0 ; Signed Integer ; ; io_twi_en ; false ; Enumerated ; ; io_pwm_num_ch ; 0 ; Signed Integer ; ; io_wdt_en ; false ; Enumerated ; ; io_trng_en ; false ; Enumerated ; ; io_trng_fifo ; 1 ; Signed Integer ; ; io_cfs_en ; false ; Enumerated ; ; io_cfs_config ; 00000000000000000000000000000000 ; Unsigned Binary ; ; io_cfs_in_size ; 32 ; Signed Integer ; ; io_cfs_out_size ; 32 ; Signed Integer ; ; io_neoled_en ; false ; Enumerated ; ; io_neoled_tx_fifo ; 1 ; Signed Integer ; ; io_gptmr_en ; false ; Enumerated ; ; io_xip_en ; false ; Enumerated ; ; io_onewire_en ; false ; Enumerated ; +------------------------------+----------------------------------+-----------------+ Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off". +--------------------------------------------------------------------------------------------------------+ ; Parameter Settings for User Entity Instance: neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst ; +------------------------------+----------------------------------+--------------------------------------+ ; Parameter Name ; Value ; Type ; +------------------------------+----------------------------------+--------------------------------------+ ; hw_thread_id ; 0 ; Signed Integer ; ; cpu_boot_addr ; 00000000000000000000000000000000 ; Unsigned Binary ; ; cpu_debug_park_addr ; 11111111111111111111100000001000 ; Unsigned Binary ; ; cpu_debug_exc_addr ; 11111111111111111111100000000000 ; Unsigned Binary ; ; cpu_extension_riscv_b ; false ; Enumerated ; ; cpu_extension_riscv_c ; true ; Enumerated ; ; cpu_extension_riscv_e ; false ; Enumerated ; ; cpu_extension_riscv_m ; true ; Enumerated ; ; cpu_extension_riscv_u ; false ; Enumerated ; ; cpu_extension_riscv_zfinx ; false ; Enumerated ; ; cpu_extension_riscv_zicsr ; true ; Enumerated ; ; cpu_extension_riscv_zicntr ; true ; Enumerated ; ; cpu_extension_riscv_zihpm ; false ; Enumerated ; ; cpu_extension_riscv_zifencei ; false ; Enumerated ; ; cpu_extension_riscv_zmmul ; false ; Enumerated ; ; cpu_extension_riscv_zxcfu ; false ; Enumerated ; ; cpu_extension_riscv_sdext ; false ; Enumerated ; ; cpu_extension_riscv_sdtrig ; false ; Enumerated ; ; fast_mul_en ; false ; Enumerated ; ; fast_shift_en ; false ; Enumerated ; ; cpu_ipb_entries ; 1 ; Signed Integer ; ; pmp_num_regions ; 0 ; Signed Integer ; ; pmp_min_granularity ; 4 ; Signed Integer ; ; hpm_num_cnts ; 0 ; Signed Integer ; ; hpm_cnt_width ; 40 ; Signed Integer ; +------------------------------+----------------------------------+--------------------------------------+ Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off". +-----------------------------------------------------------------------------------------------------------------------------------------------------+ ; Parameter Settings for User Entity Instance: neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst ; +------------------------------+----------------------------------+-----------------------------------------------------------------------------------+ ; Parameter Name ; Value ; Type ; +------------------------------+----------------------------------+-----------------------------------------------------------------------------------+ ; xlen ; 32 ; Signed Integer ; ; hw_thread_id ; 0 ; Signed Integer ; ; cpu_boot_addr ; 00000000000000000000000000000000 ; Unsigned Binary ; ; cpu_debug_park_addr ; 11111111111111111111100000001000 ; Unsigned Binary ; ; cpu_debug_exc_addr ; 11111111111111111111100000000000 ; Unsigned Binary ; ; cpu_extension_riscv_b ; false ; Enumerated ; ; cpu_extension_riscv_c ; true ; Enumerated ; ; cpu_extension_riscv_e ; false ; Enumerated ; ; cpu_extension_riscv_m ; true ; Enumerated ; ; cpu_extension_riscv_u ; false ; Enumerated ; ; cpu_extension_riscv_zfinx ; false ; Enumerated ; ; cpu_extension_riscv_zicsr ; true ; Enumerated ; ; cpu_extension_riscv_zicntr ; true ; Enumerated ; ; cpu_extension_riscv_zihpm ; false ; Enumerated ; ; cpu_extension_riscv_zifencei ; false ; Enumerated ; ; cpu_extension_riscv_zmmul ; false ; Enumerated ; ; cpu_extension_riscv_zxcfu ; false ; Enumerated ; ; cpu_extension_riscv_sdext ; false ; Enumerated ; ; cpu_extension_riscv_sdtrig ; false ; Enumerated ; ; fast_mul_en ; false ; Enumerated ; ; fast_shift_en ; false ; Enumerated ; ; cpu_ipb_entries ; 2 ; Signed Integer ; ; pmp_num_regions ; 0 ; Signed Integer ; ; pmp_min_granularity ; 4 ; Signed Integer ; ; hpm_num_cnts ; 0 ; Signed Integer ; ; hpm_cnt_width ; 40 ; Signed Integer ; +------------------------------+----------------------------------+-----------------------------------------------------------------------------------+ Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off". +----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Parameter Settings for User Entity Instance: neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|neorv32_fifo:\prefetch_buffer:0:prefetch_buffer_inst ; +----------------+-------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Parameter Name ; Value ; Type ; +----------------+-------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; fifo_depth ; 2 ; Signed Integer ; ; fifo_width ; 18 ; Signed Integer ; ; fifo_rsync ; false ; Enumerated ; ; fifo_safe ; false ; Enumerated ; ; fifo_gate ; false ; Enumerated ; +----------------+-------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off". +----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Parameter Settings for User Entity Instance: neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|neorv32_fifo:\prefetch_buffer:1:prefetch_buffer_inst ; +----------------+-------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Parameter Name ; Value ; Type ; +----------------+-------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; fifo_depth ; 2 ; Signed Integer ; ; fifo_width ; 18 ; Signed Integer ; ; fifo_rsync ; false ; Enumerated ; ; fifo_safe ; false ; Enumerated ; ; fifo_gate ; false ; Enumerated ; +----------------+-------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off". +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Parameter Settings for User Entity Instance: neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|neorv32_cpu_decompressor:\neorv32_cpu_decompressor_inst_true:neorv32_cpu_decompressor_inst ; +----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Parameter Name ; Value ; Type ; +----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; fpu_enable ; false ; Enumerated ; +----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off". +-----------------------------------------------------------------------------------------------------------------------------------------------------+ ; Parameter Settings for User Entity Instance: neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_regfile:neorv32_cpu_regfile_inst ; +-----------------------+-------+---------------------------------------------------------------------------------------------------------------------+ ; Parameter Name ; Value ; Type ; +-----------------------+-------+---------------------------------------------------------------------------------------------------------------------+ ; xlen ; 32 ; Signed Integer ; ; cpu_extension_riscv_e ; false ; Enumerated ; ; rs3_en ; false ; Enumerated ; ; rs4_en ; false ; Enumerated ; +-----------------------+-------+---------------------------------------------------------------------------------------------------------------------+ Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off". +-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Parameter Settings for User Entity Instance: neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_regfile:neorv32_cpu_regfile_inst|altsyncram:reg_file[0][31]__1 ; +------------------------------------+----------------------+-----------------------------------------------------------------------------------------------------------------------+ ; Parameter Name ; Value ; Type ; +------------------------------------+----------------------+-----------------------------------------------------------------------------------------------------------------------+ ; BYTE_SIZE_BLOCK ; 8 ; Untyped ; ; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ; ; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ; ; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ; ; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ; ; WIDTH_BYTEENA ; 1 ; Untyped ; ; OPERATION_MODE ; DUAL_PORT ; Untyped ; ; WIDTH_A ; 32 ; Untyped ; ; WIDTHAD_A ; 5 ; Untyped ; ; NUMWORDS_A ; 32 ; Untyped ; ; OUTDATA_REG_A ; UNREGISTERED ; Untyped ; ; ADDRESS_ACLR_A ; NONE ; Untyped ; ; OUTDATA_ACLR_A ; NONE ; Untyped ; ; WRCONTROL_ACLR_A ; NONE ; Untyped ; ; INDATA_ACLR_A ; NONE ; Untyped ; ; BYTEENA_ACLR_A ; NONE ; Untyped ; ; WIDTH_B ; 32 ; Untyped ; ; WIDTHAD_B ; 5 ; Untyped ; ; NUMWORDS_B ; 32 ; Untyped ; ; INDATA_REG_B ; CLOCK1 ; Untyped ; ; WRCONTROL_WRADDRESS_REG_B ; CLOCK1 ; Untyped ; ; RDCONTROL_REG_B ; CLOCK1 ; Untyped ; ; ADDRESS_REG_B ; CLOCK0 ; Untyped ; ; OUTDATA_REG_B ; UNREGISTERED ; Untyped ; ; BYTEENA_REG_B ; CLOCK1 ; Untyped ; ; INDATA_ACLR_B ; NONE ; Untyped ; ; WRCONTROL_ACLR_B ; NONE ; Untyped ; ; ADDRESS_ACLR_B ; NONE ; Untyped ; ; OUTDATA_ACLR_B ; NONE ; Untyped ; ; RDCONTROL_ACLR_B ; NONE ; Untyped ; ; BYTEENA_ACLR_B ; NONE ; Untyped ; ; WIDTH_BYTEENA_A ; 1 ; Untyped ; ; WIDTH_BYTEENA_B ; 1 ; Untyped ; ; RAM_BLOCK_TYPE ; AUTO ; Untyped ; ; BYTE_SIZE ; 8 ; Untyped ; ; READ_DURING_WRITE_MODE_MIXED_PORTS ; OLD_DATA ; Untyped ; ; READ_DURING_WRITE_MODE_PORT_A ; NEW_DATA_NO_NBE_READ ; Untyped ; ; READ_DURING_WRITE_MODE_PORT_B ; NEW_DATA_NO_NBE_READ ; Untyped ; ; INIT_FILE ; UNUSED ; Untyped ; ; INIT_FILE_LAYOUT ; PORT_A ; Untyped ; ; MAXIMUM_DEPTH ; 0 ; Untyped ; ; CLOCK_ENABLE_INPUT_A ; NORMAL ; Untyped ; ; CLOCK_ENABLE_INPUT_B ; NORMAL ; Untyped ; ; CLOCK_ENABLE_OUTPUT_A ; NORMAL ; Untyped ; ; CLOCK_ENABLE_OUTPUT_B ; NORMAL ; Untyped ; ; CLOCK_ENABLE_CORE_A ; USE_INPUT_CLKEN ; Untyped ; ; CLOCK_ENABLE_CORE_B ; USE_INPUT_CLKEN ; Untyped ; ; ENABLE_ECC ; FALSE ; Untyped ; ; ECC_PIPELINE_STAGE_ENABLED ; FALSE ; Untyped ; ; WIDTH_ECCSTATUS ; 3 ; Untyped ; ; DEVICE_FAMILY ; Cyclone V ; Untyped ; ; CBXI_PARAMETER ; altsyncram_u2n1 ; Untyped ; +------------------------------------+----------------------+-----------------------------------------------------------------------------------------------------------------------+ Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off". +-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Parameter Settings for User Entity Instance: neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_regfile:neorv32_cpu_regfile_inst|altsyncram:reg_file[0][31]__2 ; +------------------------------------+----------------------+-----------------------------------------------------------------------------------------------------------------------+ ; Parameter Name ; Value ; Type ; +------------------------------------+----------------------+-----------------------------------------------------------------------------------------------------------------------+ ; BYTE_SIZE_BLOCK ; 8 ; Untyped ; ; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ; ; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ; ; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ; ; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ; ; WIDTH_BYTEENA ; 1 ; Untyped ; ; OPERATION_MODE ; DUAL_PORT ; Untyped ; ; WIDTH_A ; 32 ; Untyped ; ; WIDTHAD_A ; 5 ; Untyped ; ; NUMWORDS_A ; 32 ; Untyped ; ; OUTDATA_REG_A ; UNREGISTERED ; Untyped ; ; ADDRESS_ACLR_A ; NONE ; Untyped ; ; OUTDATA_ACLR_A ; NONE ; Untyped ; ; WRCONTROL_ACLR_A ; NONE ; Untyped ; ; INDATA_ACLR_A ; NONE ; Untyped ; ; BYTEENA_ACLR_A ; NONE ; Untyped ; ; WIDTH_B ; 32 ; Untyped ; ; WIDTHAD_B ; 5 ; Untyped ; ; NUMWORDS_B ; 32 ; Untyped ; ; INDATA_REG_B ; CLOCK1 ; Untyped ; ; WRCONTROL_WRADDRESS_REG_B ; CLOCK1 ; Untyped ; ; RDCONTROL_REG_B ; CLOCK1 ; Untyped ; ; ADDRESS_REG_B ; CLOCK0 ; Untyped ; ; OUTDATA_REG_B ; UNREGISTERED ; Untyped ; ; BYTEENA_REG_B ; CLOCK1 ; Untyped ; ; INDATA_ACLR_B ; NONE ; Untyped ; ; WRCONTROL_ACLR_B ; NONE ; Untyped ; ; ADDRESS_ACLR_B ; NONE ; Untyped ; ; OUTDATA_ACLR_B ; NONE ; Untyped ; ; RDCONTROL_ACLR_B ; NONE ; Untyped ; ; BYTEENA_ACLR_B ; NONE ; Untyped ; ; WIDTH_BYTEENA_A ; 1 ; Untyped ; ; WIDTH_BYTEENA_B ; 1 ; Untyped ; ; RAM_BLOCK_TYPE ; AUTO ; Untyped ; ; BYTE_SIZE ; 8 ; Untyped ; ; READ_DURING_WRITE_MODE_MIXED_PORTS ; OLD_DATA ; Untyped ; ; READ_DURING_WRITE_MODE_PORT_A ; NEW_DATA_NO_NBE_READ ; Untyped ; ; READ_DURING_WRITE_MODE_PORT_B ; NEW_DATA_NO_NBE_READ ; Untyped ; ; INIT_FILE ; UNUSED ; Untyped ; ; INIT_FILE_LAYOUT ; PORT_A ; Untyped ; ; MAXIMUM_DEPTH ; 0 ; Untyped ; ; CLOCK_ENABLE_INPUT_A ; NORMAL ; Untyped ; ; CLOCK_ENABLE_INPUT_B ; NORMAL ; Untyped ; ; CLOCK_ENABLE_OUTPUT_A ; NORMAL ; Untyped ; ; CLOCK_ENABLE_OUTPUT_B ; NORMAL ; Untyped ; ; CLOCK_ENABLE_CORE_A ; USE_INPUT_CLKEN ; Untyped ; ; CLOCK_ENABLE_CORE_B ; USE_INPUT_CLKEN ; Untyped ; ; ENABLE_ECC ; FALSE ; Untyped ; ; ECC_PIPELINE_STAGE_ENABLED ; FALSE ; Untyped ; ; WIDTH_ECCSTATUS ; 3 ; Untyped ; ; DEVICE_FAMILY ; Cyclone V ; Untyped ; ; CBXI_PARAMETER ; altsyncram_u2n1 ; Untyped ; +------------------------------------+----------------------+-----------------------------------------------------------------------------------------------------------------------+ Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off". +---------------------------------------------------------------------------------------------------------------------------------------------+ ; Parameter Settings for User Entity Instance: neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_alu:neorv32_cpu_alu_inst ; +---------------------------+-------+---------------------------------------------------------------------------------------------------------+ ; Parameter Name ; Value ; Type ; +---------------------------+-------+---------------------------------------------------------------------------------------------------------+ ; xlen ; 32 ; Signed Integer ; ; cpu_extension_riscv_b ; false ; Enumerated ; ; cpu_extension_riscv_m ; true ; Enumerated ; ; cpu_extension_riscv_zmmul ; false ; Enumerated ; ; cpu_extension_riscv_zfinx ; false ; Enumerated ; ; cpu_extension_riscv_zxcfu ; false ; Enumerated ; ; fast_mul_en ; false ; Enumerated ; ; fast_shift_en ; false ; Enumerated ; +---------------------------+-------+---------------------------------------------------------------------------------------------------------+ Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off". +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Parameter Settings for User Entity Instance: neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_alu:neorv32_cpu_alu_inst|neorv32_cpu_cp_shifter:neorv32_cpu_cp_shifter_inst ; +----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Parameter Name ; Value ; Type ; +----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; xlen ; 32 ; Signed Integer ; ; fast_shift_en ; false ; Enumerated ; +----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+ Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off". +-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Parameter Settings for User Entity Instance: neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_alu:neorv32_cpu_alu_inst|neorv32_cpu_cp_muldiv:\neorv32_cpu_cp_muldiv_inst_true:neorv32_cpu_cp_muldiv_inst ; +----------------+-------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Parameter Name ; Value ; Type ; +----------------+-------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; xlen ; 32 ; Signed Integer ; ; fast_mul_en ; false ; Enumerated ; ; division_en ; true ; Enumerated ; +----------------+-------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off". +---------------------------------------------------------------------------------------------------------------------------------------------+ ; Parameter Settings for User Entity Instance: neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_bus:neorv32_cpu_bus_inst ; +---------------------+-------+---------------------------------------------------------------------------------------------------------------+ ; Parameter Name ; Value ; Type ; +---------------------+-------+---------------------------------------------------------------------------------------------------------------+ ; xlen ; 32 ; Signed Integer ; ; pmp_num_regions ; 0 ; Signed Integer ; ; pmp_min_granularity ; 4 ; Signed Integer ; +---------------------+-------+---------------------------------------------------------------------------------------------------------------+ Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off". +--------------------------------------------------------------------------------------------------------------------+ ; Parameter Settings for User Entity Instance: neorv32_top:neorv32_top_inst|neorv32_busswitch:neorv32_busswitch_inst ; +-------------------+-------+----------------------------------------------------------------------------------------+ ; Parameter Name ; Value ; Type ; +-------------------+-------+----------------------------------------------------------------------------------------+ ; port_ca_read_only ; false ; Enumerated ; ; port_cb_read_only ; true ; Enumerated ; +-------------------+-------+----------------------------------------------------------------------------------------+ Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off". +------------------------------------------------------------------------------------------------------------------------------------------+ ; Parameter Settings for User Entity Instance: neorv32_top:neorv32_top_inst|neorv32_imem:\neorv32_int_imem_inst_true:neorv32_int_imem_inst ; +----------------+----------------------------------+--------------------------------------------------------------------------------------+ ; Parameter Name ; Value ; Type ; +----------------+----------------------------------+--------------------------------------------------------------------------------------+ ; imem_base ; 00000000000000000000000000000000 ; Unsigned Binary ; ; imem_size ; 16384 ; Signed Integer ; ; imem_as_irom ; true ; Enumerated ; +----------------+----------------------------------+--------------------------------------------------------------------------------------+ Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off". +------------------------------------------------------------------------------------------------------------------------------------------+ ; Parameter Settings for User Entity Instance: neorv32_top:neorv32_top_inst|neorv32_dmem:\neorv32_int_dmem_inst_true:neorv32_int_dmem_inst ; +----------------+----------------------------------+--------------------------------------------------------------------------------------+ ; Parameter Name ; Value ; Type ; +----------------+----------------------------------+--------------------------------------------------------------------------------------+ ; dmem_base ; 10000000000000000000000000000000 ; Unsigned Binary ; ; dmem_size ; 8192 ; Signed Integer ; +----------------+----------------------------------+--------------------------------------------------------------------------------------+ Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off". +----------------------------------------------------------------------------------------------------------------+ ; Parameter Settings for User Entity Instance: neorv32_top:neorv32_top_inst|neorv32_sysinfo:neorv32_sysinfo_inst ; +----------------------+----------------------------------+------------------------------------------------------+ ; Parameter Name ; Value ; Type ; +----------------------+----------------------------------+------------------------------------------------------+ ; clock_frequency ; 50000000 ; Signed Integer ; ; custom_id ; 00000000000000000000000000000000 ; Unsigned Binary ; ; int_bootloader_en ; false ; Enumerated ; ; pmp_num_regions ; 0 ; Signed Integer ; ; mem_int_imem_en ; true ; Enumerated ; ; mem_int_imem_size ; 16384 ; Signed Integer ; ; mem_int_dmem_en ; true ; Enumerated ; ; mem_int_dmem_size ; 8192 ; Signed Integer ; ; icache_en ; false ; Enumerated ; ; icache_num_blocks ; 4 ; Signed Integer ; ; icache_block_size ; 64 ; Signed Integer ; ; icache_associativity ; 1 ; Signed Integer ; ; mem_ext_en ; false ; Enumerated ; ; mem_ext_big_endian ; false ; Enumerated ; ; on_chip_debugger_en ; false ; Enumerated ; ; io_gpio_en ; true ; Enumerated ; ; io_mtime_en ; true ; Enumerated ; ; io_uart0_en ; false ; Enumerated ; ; io_uart1_en ; false ; Enumerated ; ; io_spi_en ; false ; Enumerated ; ; io_twi_en ; false ; Enumerated ; ; io_pwm_num_ch ; 0 ; Signed Integer ; ; io_wdt_en ; false ; Enumerated ; ; io_trng_en ; false ; Enumerated ; ; io_cfs_en ; false ; Enumerated ; ; io_slink_en ; false ; Enumerated ; ; io_neoled_en ; false ; Enumerated ; ; io_xirq_num_ch ; 0 ; Signed Integer ; ; io_gptmr_en ; false ; Enumerated ; ; io_xip_en ; false ; Enumerated ; ; io_onewire_en ; false ; Enumerated ; +----------------------+----------------------------------+------------------------------------------------------+ Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off". +--------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Parameter Settings for Inferred Entity Instance: neorv32_top:neorv32_top_inst|neorv32_dmem:\neorv32_int_dmem_inst_true:neorv32_int_dmem_inst|altsyncram:mem_ram_b0_rtl_0 ; +------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------+ ; Parameter Name ; Value ; Type ; +------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------+ ; BYTE_SIZE_BLOCK ; 8 ; Untyped ; ; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ; ; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ; ; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ; ; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ; ; WIDTH_BYTEENA ; 1 ; Untyped ; ; OPERATION_MODE ; DUAL_PORT ; Untyped ; ; WIDTH_A ; 8 ; Untyped ; ; WIDTHAD_A ; 11 ; Untyped ; ; NUMWORDS_A ; 2048 ; Untyped ; ; OUTDATA_REG_A ; UNREGISTERED ; Untyped ; ; ADDRESS_ACLR_A ; NONE ; Untyped ; ; OUTDATA_ACLR_A ; NONE ; Untyped ; ; WRCONTROL_ACLR_A ; NONE ; Untyped ; ; INDATA_ACLR_A ; NONE ; Untyped ; ; BYTEENA_ACLR_A ; NONE ; Untyped ; ; WIDTH_B ; 8 ; Untyped ; ; WIDTHAD_B ; 11 ; Untyped ; ; NUMWORDS_B ; 2048 ; Untyped ; ; INDATA_REG_B ; CLOCK1 ; Untyped ; ; WRCONTROL_WRADDRESS_REG_B ; CLOCK1 ; Untyped ; ; RDCONTROL_REG_B ; CLOCK0 ; Untyped ; ; ADDRESS_REG_B ; CLOCK0 ; Untyped ; ; OUTDATA_REG_B ; UNREGISTERED ; Untyped ; ; BYTEENA_REG_B ; CLOCK1 ; Untyped ; ; INDATA_ACLR_B ; NONE ; Untyped ; ; WRCONTROL_ACLR_B ; NONE ; Untyped ; ; ADDRESS_ACLR_B ; NONE ; Untyped ; ; OUTDATA_ACLR_B ; NONE ; Untyped ; ; RDCONTROL_ACLR_B ; NONE ; Untyped ; ; BYTEENA_ACLR_B ; NONE ; Untyped ; ; WIDTH_BYTEENA_A ; 1 ; Untyped ; ; WIDTH_BYTEENA_B ; 1 ; Untyped ; ; RAM_BLOCK_TYPE ; AUTO ; Untyped ; ; BYTE_SIZE ; 8 ; Untyped ; ; READ_DURING_WRITE_MODE_MIXED_PORTS ; OLD_DATA ; Untyped ; ; READ_DURING_WRITE_MODE_PORT_A ; NEW_DATA_NO_NBE_READ ; Untyped ; ; READ_DURING_WRITE_MODE_PORT_B ; NEW_DATA_NO_NBE_READ ; Untyped ; ; INIT_FILE ; UNUSED ; Untyped ; ; INIT_FILE_LAYOUT ; PORT_A ; Untyped ; ; MAXIMUM_DEPTH ; 0 ; Untyped ; ; CLOCK_ENABLE_INPUT_A ; NORMAL ; Untyped ; ; CLOCK_ENABLE_INPUT_B ; NORMAL ; Untyped ; ; CLOCK_ENABLE_OUTPUT_A ; NORMAL ; Untyped ; ; CLOCK_ENABLE_OUTPUT_B ; NORMAL ; Untyped ; ; CLOCK_ENABLE_CORE_A ; USE_INPUT_CLKEN ; Untyped ; ; CLOCK_ENABLE_CORE_B ; USE_INPUT_CLKEN ; Untyped ; ; ENABLE_ECC ; FALSE ; Untyped ; ; ECC_PIPELINE_STAGE_ENABLED ; FALSE ; Untyped ; ; WIDTH_ECCSTATUS ; 3 ; Untyped ; ; DEVICE_FAMILY ; Cyclone V ; Untyped ; ; CBXI_PARAMETER ; altsyncram_c6q1 ; Untyped ; +------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------+ Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off". +--------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Parameter Settings for Inferred Entity Instance: neorv32_top:neorv32_top_inst|neorv32_dmem:\neorv32_int_dmem_inst_true:neorv32_int_dmem_inst|altsyncram:mem_ram_b1_rtl_0 ; +------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------+ ; Parameter Name ; Value ; Type ; +------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------+ ; BYTE_SIZE_BLOCK ; 8 ; Untyped ; ; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ; ; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ; ; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ; ; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ; ; WIDTH_BYTEENA ; 1 ; Untyped ; ; OPERATION_MODE ; DUAL_PORT ; Untyped ; ; WIDTH_A ; 8 ; Untyped ; ; WIDTHAD_A ; 11 ; Untyped ; ; NUMWORDS_A ; 2048 ; Untyped ; ; OUTDATA_REG_A ; UNREGISTERED ; Untyped ; ; ADDRESS_ACLR_A ; NONE ; Untyped ; ; OUTDATA_ACLR_A ; NONE ; Untyped ; ; WRCONTROL_ACLR_A ; NONE ; Untyped ; ; INDATA_ACLR_A ; NONE ; Untyped ; ; BYTEENA_ACLR_A ; NONE ; Untyped ; ; WIDTH_B ; 8 ; Untyped ; ; WIDTHAD_B ; 11 ; Untyped ; ; NUMWORDS_B ; 2048 ; Untyped ; ; INDATA_REG_B ; CLOCK1 ; Untyped ; ; WRCONTROL_WRADDRESS_REG_B ; CLOCK1 ; Untyped ; ; RDCONTROL_REG_B ; CLOCK0 ; Untyped ; ; ADDRESS_REG_B ; CLOCK0 ; Untyped ; ; OUTDATA_REG_B ; UNREGISTERED ; Untyped ; ; BYTEENA_REG_B ; CLOCK1 ; Untyped ; ; INDATA_ACLR_B ; NONE ; Untyped ; ; WRCONTROL_ACLR_B ; NONE ; Untyped ; ; ADDRESS_ACLR_B ; NONE ; Untyped ; ; OUTDATA_ACLR_B ; NONE ; Untyped ; ; RDCONTROL_ACLR_B ; NONE ; Untyped ; ; BYTEENA_ACLR_B ; NONE ; Untyped ; ; WIDTH_BYTEENA_A ; 1 ; Untyped ; ; WIDTH_BYTEENA_B ; 1 ; Untyped ; ; RAM_BLOCK_TYPE ; AUTO ; Untyped ; ; BYTE_SIZE ; 8 ; Untyped ; ; READ_DURING_WRITE_MODE_MIXED_PORTS ; OLD_DATA ; Untyped ; ; READ_DURING_WRITE_MODE_PORT_A ; NEW_DATA_NO_NBE_READ ; Untyped ; ; READ_DURING_WRITE_MODE_PORT_B ; NEW_DATA_NO_NBE_READ ; Untyped ; ; INIT_FILE ; UNUSED ; Untyped ; ; INIT_FILE_LAYOUT ; PORT_A ; Untyped ; ; MAXIMUM_DEPTH ; 0 ; Untyped ; ; CLOCK_ENABLE_INPUT_A ; NORMAL ; Untyped ; ; CLOCK_ENABLE_INPUT_B ; NORMAL ; Untyped ; ; CLOCK_ENABLE_OUTPUT_A ; NORMAL ; Untyped ; ; CLOCK_ENABLE_OUTPUT_B ; NORMAL ; Untyped ; ; CLOCK_ENABLE_CORE_A ; USE_INPUT_CLKEN ; Untyped ; ; CLOCK_ENABLE_CORE_B ; USE_INPUT_CLKEN ; Untyped ; ; ENABLE_ECC ; FALSE ; Untyped ; ; ECC_PIPELINE_STAGE_ENABLED ; FALSE ; Untyped ; ; WIDTH_ECCSTATUS ; 3 ; Untyped ; ; DEVICE_FAMILY ; Cyclone V ; Untyped ; ; CBXI_PARAMETER ; altsyncram_c6q1 ; Untyped ; +------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------+ Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off". +--------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Parameter Settings for Inferred Entity Instance: neorv32_top:neorv32_top_inst|neorv32_dmem:\neorv32_int_dmem_inst_true:neorv32_int_dmem_inst|altsyncram:mem_ram_b2_rtl_0 ; +------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------+ ; Parameter Name ; Value ; Type ; +------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------+ ; BYTE_SIZE_BLOCK ; 8 ; Untyped ; ; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ; ; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ; ; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ; ; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ; ; WIDTH_BYTEENA ; 1 ; Untyped ; ; OPERATION_MODE ; DUAL_PORT ; Untyped ; ; WIDTH_A ; 8 ; Untyped ; ; WIDTHAD_A ; 11 ; Untyped ; ; NUMWORDS_A ; 2048 ; Untyped ; ; OUTDATA_REG_A ; UNREGISTERED ; Untyped ; ; ADDRESS_ACLR_A ; NONE ; Untyped ; ; OUTDATA_ACLR_A ; NONE ; Untyped ; ; WRCONTROL_ACLR_A ; NONE ; Untyped ; ; INDATA_ACLR_A ; NONE ; Untyped ; ; BYTEENA_ACLR_A ; NONE ; Untyped ; ; WIDTH_B ; 8 ; Untyped ; ; WIDTHAD_B ; 11 ; Untyped ; ; NUMWORDS_B ; 2048 ; Untyped ; ; INDATA_REG_B ; CLOCK1 ; Untyped ; ; WRCONTROL_WRADDRESS_REG_B ; CLOCK1 ; Untyped ; ; RDCONTROL_REG_B ; CLOCK0 ; Untyped ; ; ADDRESS_REG_B ; CLOCK0 ; Untyped ; ; OUTDATA_REG_B ; UNREGISTERED ; Untyped ; ; BYTEENA_REG_B ; CLOCK1 ; Untyped ; ; INDATA_ACLR_B ; NONE ; Untyped ; ; WRCONTROL_ACLR_B ; NONE ; Untyped ; ; ADDRESS_ACLR_B ; NONE ; Untyped ; ; OUTDATA_ACLR_B ; NONE ; Untyped ; ; RDCONTROL_ACLR_B ; NONE ; Untyped ; ; BYTEENA_ACLR_B ; NONE ; Untyped ; ; WIDTH_BYTEENA_A ; 1 ; Untyped ; ; WIDTH_BYTEENA_B ; 1 ; Untyped ; ; RAM_BLOCK_TYPE ; AUTO ; Untyped ; ; BYTE_SIZE ; 8 ; Untyped ; ; READ_DURING_WRITE_MODE_MIXED_PORTS ; OLD_DATA ; Untyped ; ; READ_DURING_WRITE_MODE_PORT_A ; NEW_DATA_NO_NBE_READ ; Untyped ; ; READ_DURING_WRITE_MODE_PORT_B ; NEW_DATA_NO_NBE_READ ; Untyped ; ; INIT_FILE ; UNUSED ; Untyped ; ; INIT_FILE_LAYOUT ; PORT_A ; Untyped ; ; MAXIMUM_DEPTH ; 0 ; Untyped ; ; CLOCK_ENABLE_INPUT_A ; NORMAL ; Untyped ; ; CLOCK_ENABLE_INPUT_B ; NORMAL ; Untyped ; ; CLOCK_ENABLE_OUTPUT_A ; NORMAL ; Untyped ; ; CLOCK_ENABLE_OUTPUT_B ; NORMAL ; Untyped ; ; CLOCK_ENABLE_CORE_A ; USE_INPUT_CLKEN ; Untyped ; ; CLOCK_ENABLE_CORE_B ; USE_INPUT_CLKEN ; Untyped ; ; ENABLE_ECC ; FALSE ; Untyped ; ; ECC_PIPELINE_STAGE_ENABLED ; FALSE ; Untyped ; ; WIDTH_ECCSTATUS ; 3 ; Untyped ; ; DEVICE_FAMILY ; Cyclone V ; Untyped ; ; CBXI_PARAMETER ; altsyncram_c6q1 ; Untyped ; +------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------+ Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off". +--------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Parameter Settings for Inferred Entity Instance: neorv32_top:neorv32_top_inst|neorv32_dmem:\neorv32_int_dmem_inst_true:neorv32_int_dmem_inst|altsyncram:mem_ram_b3_rtl_0 ; +------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------+ ; Parameter Name ; Value ; Type ; +------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------+ ; BYTE_SIZE_BLOCK ; 8 ; Untyped ; ; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ; ; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ; ; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ; ; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ; ; WIDTH_BYTEENA ; 1 ; Untyped ; ; OPERATION_MODE ; DUAL_PORT ; Untyped ; ; WIDTH_A ; 8 ; Untyped ; ; WIDTHAD_A ; 11 ; Untyped ; ; NUMWORDS_A ; 2048 ; Untyped ; ; OUTDATA_REG_A ; UNREGISTERED ; Untyped ; ; ADDRESS_ACLR_A ; NONE ; Untyped ; ; OUTDATA_ACLR_A ; NONE ; Untyped ; ; WRCONTROL_ACLR_A ; NONE ; Untyped ; ; INDATA_ACLR_A ; NONE ; Untyped ; ; BYTEENA_ACLR_A ; NONE ; Untyped ; ; WIDTH_B ; 8 ; Untyped ; ; WIDTHAD_B ; 11 ; Untyped ; ; NUMWORDS_B ; 2048 ; Untyped ; ; INDATA_REG_B ; CLOCK1 ; Untyped ; ; WRCONTROL_WRADDRESS_REG_B ; CLOCK1 ; Untyped ; ; RDCONTROL_REG_B ; CLOCK0 ; Untyped ; ; ADDRESS_REG_B ; CLOCK0 ; Untyped ; ; OUTDATA_REG_B ; UNREGISTERED ; Untyped ; ; BYTEENA_REG_B ; CLOCK1 ; Untyped ; ; INDATA_ACLR_B ; NONE ; Untyped ; ; WRCONTROL_ACLR_B ; NONE ; Untyped ; ; ADDRESS_ACLR_B ; NONE ; Untyped ; ; OUTDATA_ACLR_B ; NONE ; Untyped ; ; RDCONTROL_ACLR_B ; NONE ; Untyped ; ; BYTEENA_ACLR_B ; NONE ; Untyped ; ; WIDTH_BYTEENA_A ; 1 ; Untyped ; ; WIDTH_BYTEENA_B ; 1 ; Untyped ; ; RAM_BLOCK_TYPE ; AUTO ; Untyped ; ; BYTE_SIZE ; 8 ; Untyped ; ; READ_DURING_WRITE_MODE_MIXED_PORTS ; OLD_DATA ; Untyped ; ; READ_DURING_WRITE_MODE_PORT_A ; NEW_DATA_NO_NBE_READ ; Untyped ; ; READ_DURING_WRITE_MODE_PORT_B ; NEW_DATA_NO_NBE_READ ; Untyped ; ; INIT_FILE ; UNUSED ; Untyped ; ; INIT_FILE_LAYOUT ; PORT_A ; Untyped ; ; MAXIMUM_DEPTH ; 0 ; Untyped ; ; CLOCK_ENABLE_INPUT_A ; NORMAL ; Untyped ; ; CLOCK_ENABLE_INPUT_B ; NORMAL ; Untyped ; ; CLOCK_ENABLE_OUTPUT_A ; NORMAL ; Untyped ; ; CLOCK_ENABLE_OUTPUT_B ; NORMAL ; Untyped ; ; CLOCK_ENABLE_CORE_A ; USE_INPUT_CLKEN ; Untyped ; ; CLOCK_ENABLE_CORE_B ; USE_INPUT_CLKEN ; Untyped ; ; ENABLE_ECC ; FALSE ; Untyped ; ; ECC_PIPELINE_STAGE_ENABLED ; FALSE ; Untyped ; ; WIDTH_ECCSTATUS ; 3 ; Untyped ; ; DEVICE_FAMILY ; Cyclone V ; Untyped ; ; CBXI_PARAMETER ; altsyncram_c6q1 ; Untyped ; +------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------+ Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off". +----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; altsyncram Parameter Settings by Entity Instance ; +-------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------+ ; Name ; Value ; +-------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------+ ; Number of entity instances ; 6 ; ; Entity Instance ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_regfile:neorv32_cpu_regfile_inst|altsyncram:reg_file[0][31]__1 ; ; -- OPERATION_MODE ; DUAL_PORT ; ; -- WIDTH_A ; 32 ; ; -- NUMWORDS_A ; 32 ; ; -- OUTDATA_REG_A ; UNREGISTERED ; ; -- WIDTH_B ; 32 ; ; -- NUMWORDS_B ; 32 ; ; -- ADDRESS_REG_B ; CLOCK0 ; ; -- OUTDATA_REG_B ; UNREGISTERED ; ; -- RAM_BLOCK_TYPE ; AUTO ; ; -- READ_DURING_WRITE_MODE_MIXED_PORTS ; OLD_DATA ; ; Entity Instance ; neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_regfile:neorv32_cpu_regfile_inst|altsyncram:reg_file[0][31]__2 ; ; -- OPERATION_MODE ; DUAL_PORT ; ; -- WIDTH_A ; 32 ; ; -- NUMWORDS_A ; 32 ; ; -- OUTDATA_REG_A ; UNREGISTERED ; ; -- WIDTH_B ; 32 ; ; -- NUMWORDS_B ; 32 ; ; -- ADDRESS_REG_B ; CLOCK0 ; ; -- OUTDATA_REG_B ; UNREGISTERED ; ; -- RAM_BLOCK_TYPE ; AUTO ; ; -- READ_DURING_WRITE_MODE_MIXED_PORTS ; OLD_DATA ; ; Entity Instance ; neorv32_top:neorv32_top_inst|neorv32_dmem:\neorv32_int_dmem_inst_true:neorv32_int_dmem_inst|altsyncram:mem_ram_b0_rtl_0 ; ; -- OPERATION_MODE ; DUAL_PORT ; ; -- WIDTH_A ; 8 ; ; -- NUMWORDS_A ; 2048 ; ; -- OUTDATA_REG_A ; UNREGISTERED ; ; -- WIDTH_B ; 8 ; ; -- NUMWORDS_B ; 2048 ; ; -- ADDRESS_REG_B ; CLOCK0 ; ; -- OUTDATA_REG_B ; UNREGISTERED ; ; -- RAM_BLOCK_TYPE ; AUTO ; ; -- READ_DURING_WRITE_MODE_MIXED_PORTS ; OLD_DATA ; ; Entity Instance ; neorv32_top:neorv32_top_inst|neorv32_dmem:\neorv32_int_dmem_inst_true:neorv32_int_dmem_inst|altsyncram:mem_ram_b1_rtl_0 ; ; -- OPERATION_MODE ; DUAL_PORT ; ; -- WIDTH_A ; 8 ; ; -- NUMWORDS_A ; 2048 ; ; -- OUTDATA_REG_A ; UNREGISTERED ; ; -- WIDTH_B ; 8 ; ; -- NUMWORDS_B ; 2048 ; ; -- ADDRESS_REG_B ; CLOCK0 ; ; -- OUTDATA_REG_B ; UNREGISTERED ; ; -- RAM_BLOCK_TYPE ; AUTO ; ; -- READ_DURING_WRITE_MODE_MIXED_PORTS ; OLD_DATA ; ; Entity Instance ; neorv32_top:neorv32_top_inst|neorv32_dmem:\neorv32_int_dmem_inst_true:neorv32_int_dmem_inst|altsyncram:mem_ram_b2_rtl_0 ; ; -- OPERATION_MODE ; DUAL_PORT ; ; -- WIDTH_A ; 8 ; ; -- NUMWORDS_A ; 2048 ; ; -- OUTDATA_REG_A ; UNREGISTERED ; ; -- WIDTH_B ; 8 ; ; -- NUMWORDS_B ; 2048 ; ; -- ADDRESS_REG_B ; CLOCK0 ; ; -- OUTDATA_REG_B ; UNREGISTERED ; ; -- RAM_BLOCK_TYPE ; AUTO ; ; -- READ_DURING_WRITE_MODE_MIXED_PORTS ; OLD_DATA ; ; Entity Instance ; neorv32_top:neorv32_top_inst|neorv32_dmem:\neorv32_int_dmem_inst_true:neorv32_int_dmem_inst|altsyncram:mem_ram_b3_rtl_0 ; ; -- OPERATION_MODE ; DUAL_PORT ; ; -- WIDTH_A ; 8 ; ; -- NUMWORDS_A ; 2048 ; ; -- OUTDATA_REG_A ; UNREGISTERED ; ; -- WIDTH_B ; 8 ; ; -- NUMWORDS_B ; 2048 ; ; -- ADDRESS_REG_B ; CLOCK0 ; ; -- OUTDATA_REG_B ; UNREGISTERED ; ; -- RAM_BLOCK_TYPE ; AUTO ; ; -- READ_DURING_WRITE_MODE_MIXED_PORTS ; OLD_DATA ; +-------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------+ +-----------------------------------------------------------------------------------------------------+ ; Port Connectivity Checks: "neorv32_top:neorv32_top_inst|neorv32_bus_keeper:neorv32_bus_keeper_inst" ; +-----------+-------+----------+----------------------------------------------------------------------+ ; Port ; Type ; Severity ; Details ; +-----------+-------+----------+----------------------------------------------------------------------+ ; bus_tmo_i ; Input ; Info ; Stuck at GND ; ; bus_ext_i ; Input ; Info ; Stuck at GND ; ; bus_xip_i ; Input ; Info ; Stuck at GND ; +-----------+-------+----------+----------------------------------------------------------------------+ +---------------------------------------------------------------------------------------------------------------------------+ ; Port Connectivity Checks: "neorv32_top:neorv32_top_inst|neorv32_busswitch:neorv32_busswitch_inst" ; +-----------------+--------+----------+-------------------------------------------------------------------------------------+ ; Port ; Type ; Severity ; Details ; +-----------------+--------+----------+-------------------------------------------------------------------------------------+ ; ca_bus_cached_i ; Input ; Info ; Stuck at GND ; ; cb_bus_cached_i ; Input ; Info ; Stuck at GND ; ; cb_bus_wdata_i ; Input ; Info ; Stuck at GND ; ; cb_bus_ben_i ; Input ; Info ; Stuck at GND ; ; cb_bus_we_i ; Input ; Info ; Stuck at GND ; ; p_bus_priv_o ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ; ; p_bus_cached_o ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ; +-----------------+--------+----------+-------------------------------------------------------------------------------------+ +-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Port Connectivity Checks: "neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|neorv32_fifo:\prefetch_buffer:1:prefetch_buffer_inst" ; +-------------+--------+----------+-------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Port ; Type ; Severity ; Details ; +-------------+--------+----------+-------------------------------------------------------------------------------------------------------------------------------------------------------+ ; half_o ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ; ; wdata_i[16] ; Input ; Info ; Stuck at GND ; ; rdata_o[16] ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ; +-------------+--------+----------+-------------------------------------------------------------------------------------------------------------------------------------------------------+ +-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Port Connectivity Checks: "neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|neorv32_fifo:\prefetch_buffer:0:prefetch_buffer_inst" ; +-------------+--------+----------+-------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Port ; Type ; Severity ; Details ; +-------------+--------+----------+-------------------------------------------------------------------------------------------------------------------------------------------------------+ ; half_o ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ; ; wdata_i[16] ; Input ; Info ; Stuck at GND ; ; rdata_o[16] ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ; +-------------+--------+----------+-------------------------------------------------------------------------------------------------------------------------------------------------------+ +-------------------------------------------------------------------------------------------------------------------------+ ; Port Connectivity Checks: "neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst" ; +---------------+--------+----------+-------------------------------------------------------------------------------------+ ; Port ; Type ; Severity ; Details ; +---------------+--------+----------+-------------------------------------------------------------------------------------+ ; sleep_o ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ; ; debug_o ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ; ; firq_i ; Input ; Info ; Stuck at GND ; ; db_halt_req_i ; Input ; Info ; Stuck at GND ; +---------------+--------+----------+-------------------------------------------------------------------------------------+ +--------------------------------------------------------------------------------------------------------------------------+ ; Port Connectivity Checks: "neorv32_top:neorv32_top_inst" ; +----------------+--------+----------+-------------------------------------------------------------------------------------+ ; Port ; Type ; Severity ; Details ; +----------------+--------+----------+-------------------------------------------------------------------------------------+ ; jtag_tdo_o ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ; ; wb_tag_o ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ; ; wb_adr_o ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ; ; wb_dat_o ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ; ; wb_we_o ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ; ; wb_sel_o ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ; ; wb_stb_o ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ; ; wb_cyc_o ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ; ; wb_ack_i ; Input ; Info ; Stuck at GND ; ; wb_err_i ; Input ; Info ; Stuck at GND ; ; fence_o ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ; ; fencei_o ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ; ; xip_csn_o ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ; ; xip_clk_o ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ; ; xip_sdi_i ; Input ; Info ; Stuck at GND ; ; xip_sdo_o ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ; ; slink_tx_dat_o ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ; ; slink_tx_val_o ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ; ; slink_tx_rdy_i ; Input ; Info ; Stuck at GND ; ; slink_tx_lst_o ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ; ; slink_rx_val_i ; Input ; Info ; Stuck at GND ; ; slink_rx_rdy_o ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ; ; slink_rx_lst_i ; Input ; Info ; Stuck at GND ; ; gpio_o[63..8] ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ; ; uart0_txd_o ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ; ; uart0_rts_o ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ; ; uart0_cts_i ; Input ; Info ; Stuck at GND ; ; uart1_txd_o ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ; ; uart1_rts_o ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ; ; uart1_cts_i ; Input ; Info ; Stuck at GND ; ; spi_sck_o ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ; ; spi_sdo_o ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ; ; spi_csn_o ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ; ; twi_sda_io ; Bidir ; Warning ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ; ; twi_scl_io ; Bidir ; Warning ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ; ; onewire_io ; Bidir ; Warning ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ; ; pwm_o ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ; ; cfs_out_o ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ; ; neoled_o ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ; ; xirq_i ; Input ; Info ; Stuck at GND ; ; mtime_irq_i ; Input ; Info ; Stuck at GND ; ; msw_irq_i ; Input ; Info ; Stuck at GND ; ; mext_irq_i ; Input ; Info ; Stuck at GND ; +----------------+--------+----------+-------------------------------------------------------------------------------------+ +-----------------------------------------------------+ ; Post-Synthesis Netlist Statistics for Top Partition ; +-----------------------+-----------------------------+ ; Type ; Count ; +-----------------------+-----------------------------+ ; arriav_ff ; 1315 ; ; CLR ; 126 ; ; CLR SCLR ; 10 ; ; CLR SLD ; 224 ; ; ENA ; 223 ; ; ENA CLR ; 440 ; ; ENA CLR SCLR SLD ; 1 ; ; ENA CLR SLD ; 31 ; ; ENA SLD ; 8 ; ; SLD ; 68 ; ; plain ; 184 ; ; arriav_lcell_comb ; 2482 ; ; arith ; 420 ; ; 0 data inputs ; 3 ; ; 1 data inputs ; 249 ; ; 2 data inputs ; 5 ; ; 3 data inputs ; 31 ; ; 4 data inputs ; 67 ; ; 5 data inputs ; 65 ; ; extend ; 78 ; ; 7 data inputs ; 78 ; ; normal ; 1951 ; ; 0 data inputs ; 1 ; ; 1 data inputs ; 10 ; ; 2 data inputs ; 96 ; ; 3 data inputs ; 399 ; ; 4 data inputs ; 470 ; ; 5 data inputs ; 397 ; ; 6 data inputs ; 578 ; ; shared ; 33 ; ; 0 data inputs ; 1 ; ; 2 data inputs ; 32 ; ; boundary_port ; 10 ; ; stratixv_ram_block ; 96 ; ; ; ; ; Max LUT depth ; 8.10 ; ; Average LUT depth ; 4.05 ; +-----------------------+-----------------------------+ +-------------------------------+ ; Elapsed Time Per Partition ; +----------------+--------------+ ; Partition Name ; Elapsed Time ; +----------------+--------------+ ; Top ; 00:00:07 ; +----------------+--------------+ +-------------------------------+ ; Analysis & Synthesis Messages ; +-------------------------------+ Info: ******************************************************************* Info: Running Quartus Prime Analysis & Synthesis Info: Version 22.1std.0 Build 915 10/25/2022 SC Standard Edition Info: Processing started: Wed Feb 8 15:41:21 2023 Info: Command: quartus_map --read_settings_files=on --write_settings_files=off test_neorv32 -c test_neorv32 Info (16303): Aggressive Performance optimization mode selected -- timing performance will be prioritized at the potential cost of increased logic area and compilation time Warning (18236): Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance. Info (20030): Parallel compilation is enabled and will use 4 of the 4 processors detected Info (12021): Found 2 design units, including 1 entities, in source file /home/seti/neorv32/rtl/test_setups/neorv32_test_setup_approm.vhd Info (12022): Found design unit 1: neorv32_test_setup_approm-neorv32_test_setup_approm_rtl File: /home/seti/neorv32/rtl/test_setups/neorv32_test_setup_approm.vhd Line: 58 Info (12023): Found entity 1: neorv32_test_setup_approm File: /home/seti/neorv32/rtl/test_setups/neorv32_test_setup_approm.vhd Line: 42 Info (12021): Found 1 design units, including 0 entities, in source file /home/seti/neorv32/rtl/core/mem/neorv32_imem.default.vhd Info (12022): Found design unit 1: neorv32_imem-neorv32_imem_rtl File: /home/seti/neorv32/rtl/core/mem/neorv32_imem.default.vhd Line: 46 Info (12021): Found 1 design units, including 0 entities, in source file /home/seti/neorv32/rtl/core/mem/neorv32_dmem.default.vhd Info (12022): Found design unit 1: neorv32_dmem-neorv32_dmem_rtl File: /home/seti/neorv32/rtl/core/mem/neorv32_dmem.default.vhd Line: 42 Info (12021): Found 2 design units, including 1 entities, in source file /home/seti/neorv32/rtl/core/neorv32_xirq.vhd Info (12022): Found design unit 1: neorv32_xirq-neorv32_xirq_rtl File: /home/seti/neorv32/rtl/core/neorv32_xirq.vhd Line: 72 Info (12023): Found entity 1: neorv32_xirq File: /home/seti/neorv32/rtl/core/neorv32_xirq.vhd Line: 49 Info (12021): Found 4 design units, including 2 entities, in source file /home/seti/neorv32/rtl/core/neorv32_xip.vhd Info (12022): Found design unit 1: neorv32_xip-neorv32_xip_rtl File: /home/seti/neorv32/rtl/core/neorv32_xip.vhd Line: 82 Info (12022): Found design unit 2: neorv32_xip_phy-neorv32_xip_phy_rtl File: /home/seti/neorv32/rtl/core/neorv32_xip.vhd Line: 501 Info (12023): Found entity 1: neorv32_xip File: /home/seti/neorv32/rtl/core/neorv32_xip.vhd Line: 48 Info (12023): Found entity 2: neorv32_xip_phy File: /home/seti/neorv32/rtl/core/neorv32_xip.vhd Line: 476 Info (12021): Found 2 design units, including 1 entities, in source file /home/seti/neorv32/rtl/core/neorv32_wishbone.vhd Info (12022): Found design unit 1: neorv32_wishbone-neorv32_wishbone_rtl File: /home/seti/neorv32/rtl/core/neorv32_wishbone.vhd Line: 104 Info (12023): Found entity 1: neorv32_wishbone File: /home/seti/neorv32/rtl/core/neorv32_wishbone.vhd Line: 55 Info (12021): Found 2 design units, including 1 entities, in source file /home/seti/neorv32/rtl/core/neorv32_wdt.vhd Info (12022): Found design unit 1: neorv32_wdt-neorv32_wdt_rtl File: /home/seti/neorv32/rtl/core/neorv32_wdt.vhd Line: 74 Info (12023): Found entity 1: neorv32_wdt File: /home/seti/neorv32/rtl/core/neorv32_wdt.vhd Line: 50 Info (12021): Found 2 design units, including 1 entities, in source file /home/seti/neorv32/rtl/core/neorv32_uart.vhd Info (12022): Found design unit 1: neorv32_uart-neorv32_uart_rtl File: /home/seti/neorv32/rtl/core/neorv32_uart.vhd Line: 99 Info (12023): Found entity 1: neorv32_uart File: /home/seti/neorv32/rtl/core/neorv32_uart.vhd Line: 68 Info (12021): Found 2 design units, including 1 entities, in source file /home/seti/neorv32/rtl/core/neorv32_twi.vhd Info (12022): Found design unit 1: neorv32_twi-neorv32_twi_rtl File: /home/seti/neorv32/rtl/core/neorv32_twi.vhd Line: 71 Info (12023): Found entity 1: neorv32_twi File: /home/seti/neorv32/rtl/core/neorv32_twi.vhd Line: 47 Info (12021): Found 6 design units, including 3 entities, in source file /home/seti/neorv32/rtl/core/neorv32_trng.vhd Info (12022): Found design unit 1: neorv32_trng-neorv32_trng_rtl File: /home/seti/neorv32/rtl/core/neorv32_trng.vhd Line: 63 Info (12022): Found design unit 2: neoTRNG-neoTRNG_rtl File: /home/seti/neorv32/rtl/core/neorv32_trng.vhd Line: 310 Info (12022): Found design unit 3: neoTRNG_cell-neoTRNG_cell_rtl File: /home/seti/neorv32/rtl/core/neorv32_trng.vhd Line: 638 Info (12023): Found entity 1: neorv32_trng File: /home/seti/neorv32/rtl/core/neorv32_trng.vhd Line: 46 Info (12023): Found entity 2: neoTRNG File: /home/seti/neorv32/rtl/core/neorv32_trng.vhd Line: 292 Info (12023): Found entity 3: neoTRNG_cell File: /home/seti/neorv32/rtl/core/neorv32_trng.vhd Line: 622 Info (12021): Found 2 design units, including 1 entities, in source file /home/seti/neorv32/rtl/core/neorv32_top.vhd Info (12022): Found design unit 1: neorv32_top-neorv32_top_rtl File: /home/seti/neorv32/rtl/core/neorv32_top.vhd Line: 239 Info (12023): Found entity 1: neorv32_top File: /home/seti/neorv32/rtl/core/neorv32_top.vhd Line: 47 Info (12021): Found 2 design units, including 1 entities, in source file /home/seti/neorv32/rtl/core/neorv32_sysinfo.vhd Info (12022): Found design unit 1: neorv32_sysinfo-neorv32_sysinfo_rtl File: /home/seti/neorv32/rtl/core/neorv32_sysinfo.vhd Line: 99 Info (12023): Found entity 1: neorv32_sysinfo File: /home/seti/neorv32/rtl/core/neorv32_sysinfo.vhd Line: 45 Info (12021): Found 2 design units, including 1 entities, in source file /home/seti/neorv32/rtl/core/neorv32_spi.vhd Info (12022): Found design unit 1: neorv32_spi-neorv32_spi_rtl File: /home/seti/neorv32/rtl/core/neorv32_spi.vhd Line: 73 Info (12023): Found entity 1: neorv32_spi File: /home/seti/neorv32/rtl/core/neorv32_spi.vhd Line: 46 Info (12021): Found 2 design units, including 1 entities, in source file /home/seti/neorv32/rtl/core/neorv32_slink.vhd Info (12022): Found design unit 1: neorv32_slink-neorv32_slink_rtl File: /home/seti/neorv32/rtl/core/neorv32_slink.vhd Line: 80 Info (12023): Found entity 1: neorv32_slink File: /home/seti/neorv32/rtl/core/neorv32_slink.vhd Line: 47 Info (12021): Found 2 design units, including 1 entities, in source file /home/seti/neorv32/rtl/core/neorv32_pwm.vhd Info (12022): Found design unit 1: neorv32_pwm-neorv32_pwm_rtl File: /home/seti/neorv32/rtl/core/neorv32_pwm.vhd Line: 67 Info (12023): Found entity 1: neorv32_pwm File: /home/seti/neorv32/rtl/core/neorv32_pwm.vhd Line: 45 Info (12021): Found 4 design units, including 0 entities, in source file /home/seti/neorv32/rtl/core/neorv32_package.vhd Info (12022): Found design unit 1: neorv32_package (neorv32) File: /home/seti/neorv32/rtl/core/neorv32_package.vhd Line: 39 Info (12022): Found design unit 2: neorv32_package-body File: /home/seti/neorv32/rtl/core/neorv32_package.vhd Line: 2289 Info (12022): Found design unit 3: neorv32_bootloader_image (neorv32) File: /home/seti/neorv32/rtl/core/neorv32_package.vhd Line: 2609 Info (12022): Found design unit 4: neorv32_application_image (neorv32) File: /home/seti/neorv32/rtl/core/neorv32_package.vhd Line: 2626 Info (12021): Found 2 design units, including 1 entities, in source file /home/seti/neorv32/rtl/core/neorv32_onewire.vhd Info (12022): Found design unit 1: neorv32_onewire-neorv32_onewire_rtl File: /home/seti/neorv32/rtl/core/neorv32_onewire.vhd Line: 73 Info (12023): Found entity 1: neorv32_onewire File: /home/seti/neorv32/rtl/core/neorv32_onewire.vhd Line: 51 Info (12021): Found 2 design units, including 1 entities, in source file /home/seti/neorv32/rtl/core/neorv32_neoled.vhd Info (12022): Found design unit 1: neorv32_neoled-neorv32_neoled_rtl File: /home/seti/neorv32/rtl/core/neorv32_neoled.vhd Line: 80 Info (12023): Found entity 1: neorv32_neoled File: /home/seti/neorv32/rtl/core/neorv32_neoled.vhd Line: 56 Info (12021): Found 2 design units, including 1 entities, in source file /home/seti/neorv32/rtl/core/neorv32_mtime.vhd Info (12022): Found design unit 1: neorv32_mtime-neorv32_mtime_rtl File: /home/seti/neorv32/rtl/core/neorv32_mtime.vhd Line: 61 Info (12023): Found entity 1: neorv32_mtime File: /home/seti/neorv32/rtl/core/neorv32_mtime.vhd Line: 45 Info (12021): Found 1 design units, including 1 entities, in source file /home/seti/neorv32/rtl/core/neorv32_imem.entity.vhd Info (12023): Found entity 1: neorv32_imem File: /home/seti/neorv32/rtl/core/neorv32_imem.entity.vhd Line: 42 Info (12021): Found 4 design units, including 2 entities, in source file /home/seti/neorv32/rtl/core/neorv32_icache.vhd Info (12022): Found design unit 1: neorv32_icache-neorv32_icache_rtl File: /home/seti/neorv32/rtl/core/neorv32_icache.vhd Line: 73 Info (12022): Found design unit 2: neorv32_icache_memory-neorv32_icache_memory_rtl File: /home/seti/neorv32/rtl/core/neorv32_icache.vhd Line: 414 Info (12023): Found entity 1: neorv32_icache File: /home/seti/neorv32/rtl/core/neorv32_icache.vhd Line: 45 Info (12023): Found entity 2: neorv32_icache_memory File: /home/seti/neorv32/rtl/core/neorv32_icache.vhd Line: 385 Info (12021): Found 2 design units, including 1 entities, in source file /home/seti/neorv32/rtl/core/neorv32_gptmr.vhd Info (12022): Found design unit 1: neorv32_gptmr-neorv32_gptmr_rtl File: /home/seti/neorv32/rtl/core/neorv32_gptmr.vhd Line: 66 Info (12023): Found entity 1: neorv32_gptmr File: /home/seti/neorv32/rtl/core/neorv32_gptmr.vhd Line: 47 Info (12021): Found 2 design units, including 1 entities, in source file /home/seti/neorv32/rtl/core/neorv32_gpio.vhd Info (12022): Found design unit 1: neorv32_gpio-neorv32_gpio_rtl File: /home/seti/neorv32/rtl/core/neorv32_gpio.vhd Line: 63 Info (12023): Found entity 1: neorv32_gpio File: /home/seti/neorv32/rtl/core/neorv32_gpio.vhd Line: 45 Info (12021): Found 2 design units, including 1 entities, in source file /home/seti/neorv32/rtl/core/neorv32_fifo.vhd Info (12022): Found design unit 1: neorv32_fifo-neorv32_fifo_rtl File: /home/seti/neorv32/rtl/core/neorv32_fifo.vhd Line: 67 Info (12023): Found entity 1: neorv32_fifo File: /home/seti/neorv32/rtl/core/neorv32_fifo.vhd Line: 42 Info (12021): Found 1 design units, including 1 entities, in source file /home/seti/neorv32/rtl/core/neorv32_dmem.entity.vhd Info (12023): Found entity 1: neorv32_dmem File: /home/seti/neorv32/rtl/core/neorv32_dmem.entity.vhd Line: 39 Info (12021): Found 2 design units, including 1 entities, in source file /home/seti/neorv32/rtl/core/neorv32_debug_dtm.vhd Info (12022): Found design unit 1: neorv32_debug_dtm-neorv32_debug_dtm_rtl File: /home/seti/neorv32/rtl/core/neorv32_debug_dtm.vhd Line: 70 Info (12023): Found entity 1: neorv32_debug_dtm File: /home/seti/neorv32/rtl/core/neorv32_debug_dtm.vhd Line: 41 Info (12021): Found 2 design units, including 1 entities, in source file /home/seti/neorv32/rtl/core/neorv32_debug_dm.vhd Info (12022): Found design unit 1: neorv32_debug_dm-neorv32_debug_dm_rtl File: /home/seti/neorv32/rtl/core/neorv32_debug_dm.vhd Line: 88 Info (12023): Found entity 1: neorv32_debug_dm File: /home/seti/neorv32/rtl/core/neorv32_debug_dm.vhd Line: 58 Info (12021): Found 2 design units, including 1 entities, in source file /home/seti/neorv32/rtl/core/neorv32_cpu_regfile.vhd Info (12022): Found design unit 1: neorv32_cpu_regfile-neorv32_cpu_regfile_rtl File: /home/seti/neorv32/rtl/core/neorv32_cpu_regfile.vhd Line: 78 Info (12023): Found entity 1: neorv32_cpu_regfile File: /home/seti/neorv32/rtl/core/neorv32_cpu_regfile.vhd Line: 54 Info (12021): Found 2 design units, including 1 entities, in source file /home/seti/neorv32/rtl/core/neorv32_cpu_decompressor.vhd Info (12022): Found design unit 1: neorv32_cpu_decompressor-neorv32_cpu_decompressor_rtl File: /home/seti/neorv32/rtl/core/neorv32_cpu_decompressor.vhd Line: 55 Info (12023): Found entity 1: neorv32_cpu_decompressor File: /home/seti/neorv32/rtl/core/neorv32_cpu_decompressor.vhd Line: 42 Info (12021): Found 2 design units, including 1 entities, in source file /home/seti/neorv32/rtl/core/neorv32_cpu_cp_shifter.vhd Info (12022): Found design unit 1: neorv32_cpu_cp_shifter-neorv32_cpu_cp_shifter_rtl File: /home/seti/neorv32/rtl/core/neorv32_cpu_cp_shifter.vhd Line: 65 Info (12023): Found entity 1: neorv32_cpu_cp_shifter File: /home/seti/neorv32/rtl/core/neorv32_cpu_cp_shifter.vhd Line: 45 Info (12021): Found 2 design units, including 1 entities, in source file /home/seti/neorv32/rtl/core/neorv32_cpu_cp_muldiv.vhd Info (12022): Found design unit 1: neorv32_cpu_cp_muldiv-neorv32_cpu_cp_muldiv_rtl File: /home/seti/neorv32/rtl/core/neorv32_cpu_cp_muldiv.vhd Line: 67 Info (12023): Found entity 1: neorv32_cpu_cp_muldiv File: /home/seti/neorv32/rtl/core/neorv32_cpu_cp_muldiv.vhd Line: 46 Info (12021): Found 6 design units, including 3 entities, in source file /home/seti/neorv32/rtl/core/neorv32_cpu_cp_fpu.vhd Info (12022): Found design unit 1: neorv32_cpu_cp_fpu-neorv32_cpu_cp_fpu_rtl File: /home/seti/neorv32/rtl/core/neorv32_cpu_cp_fpu.vhd Line: 80 Info (12022): Found design unit 2: neorv32_cpu_cp_fpu_normalizer-neorv32_cpu_cp_fpu_normalizer_rtl File: /home/seti/neorv32/rtl/core/neorv32_cpu_cp_fpu.vhd Line: 1200 Info (12022): Found design unit 3: neorv32_cpu_cp_fpu_f2i-neorv32_cpu_cp_fpu_f2i_rtl File: /home/seti/neorv32/rtl/core/neorv32_cpu_cp_fpu.vhd Line: 1585 Info (12023): Found entity 1: neorv32_cpu_cp_fpu File: /home/seti/neorv32/rtl/core/neorv32_cpu_cp_fpu.vhd Line: 58 Info (12023): Found entity 2: neorv32_cpu_cp_fpu_normalizer File: /home/seti/neorv32/rtl/core/neorv32_cpu_cp_fpu.vhd Line: 1178 Info (12023): Found entity 3: neorv32_cpu_cp_fpu_f2i File: /home/seti/neorv32/rtl/core/neorv32_cpu_cp_fpu.vhd Line: 1565 Info (12021): Found 2 design units, including 1 entities, in source file /home/seti/neorv32/rtl/core/neorv32_cpu_cp_cfu.vhd Info (12022): Found design unit 1: neorv32_cpu_cp_cfu-neorv32_cpu_cp_cfu_rtl File: /home/seti/neorv32/rtl/core/neorv32_cpu_cp_cfu.vhd Line: 68 Info (12023): Found entity 1: neorv32_cpu_cp_cfu File: /home/seti/neorv32/rtl/core/neorv32_cpu_cp_cfu.vhd Line: 47 Info (12021): Found 2 design units, including 1 entities, in source file /home/seti/neorv32/rtl/core/neorv32_cpu_cp_bitmanip.vhd Info (12022): Found design unit 1: neorv32_cpu_cp_bitmanip-neorv32_cpu_cp_bitmanip_rtl File: /home/seti/neorv32/rtl/core/neorv32_cpu_cp_bitmanip.vhd Line: 73 Info (12023): Found entity 1: neorv32_cpu_cp_bitmanip File: /home/seti/neorv32/rtl/core/neorv32_cpu_cp_bitmanip.vhd Line: 51 Info (12021): Found 2 design units, including 1 entities, in source file /home/seti/neorv32/rtl/core/neorv32_cpu_control.vhd Info (12022): Found design unit 1: neorv32_cpu_control-neorv32_cpu_control_rtl File: /home/seti/neorv32/rtl/core/neorv32_cpu_control.vhd Line: 132 Info (12023): Found entity 1: neorv32_cpu_control File: /home/seti/neorv32/rtl/core/neorv32_cpu_control.vhd Line: 52 Info (12021): Found 2 design units, including 1 entities, in source file /home/seti/neorv32/rtl/core/neorv32_cpu_bus.vhd Info (12022): Found design unit 1: neorv32_cpu_bus-neorv32_cpu_bus_rtl File: /home/seti/neorv32/rtl/core/neorv32_cpu_bus.vhd Line: 85 Info (12023): Found entity 1: neorv32_cpu_bus File: /home/seti/neorv32/rtl/core/neorv32_cpu_bus.vhd Line: 44 Info (12021): Found 2 design units, including 1 entities, in source file /home/seti/neorv32/rtl/core/neorv32_cpu_alu.vhd Info (12022): Found design unit 1: neorv32_cpu_alu-neorv32_cpu_cpu_rtl File: /home/seti/neorv32/rtl/core/neorv32_cpu_alu.vhd Line: 79 Info (12023): Found entity 1: neorv32_cpu_alu File: /home/seti/neorv32/rtl/core/neorv32_cpu_alu.vhd Line: 44 Info (12021): Found 2 design units, including 1 entities, in source file /home/seti/neorv32/rtl/core/neorv32_cpu.vhd Info (12022): Found design unit 1: neorv32_cpu-neorv32_cpu_rtl File: /home/seti/neorv32/rtl/core/neorv32_cpu.vhd Line: 116 Info (12023): Found entity 1: neorv32_cpu File: /home/seti/neorv32/rtl/core/neorv32_cpu.vhd Line: 47 Info (12021): Found 2 design units, including 1 entities, in source file /home/seti/neorv32/rtl/core/neorv32_cfs.vhd Info (12022): Found design unit 1: neorv32_cfs-neorv32_cfs_rtl File: /home/seti/neorv32/rtl/core/neorv32_cfs.vhd Line: 78 Info (12023): Found entity 1: neorv32_cfs File: /home/seti/neorv32/rtl/core/neorv32_cfs.vhd Line: 49 Info (12021): Found 2 design units, including 1 entities, in source file /home/seti/neorv32/rtl/core/neorv32_busswitch.vhd Info (12022): Found design unit 1: neorv32_busswitch-neorv32_busswitch_rtl File: /home/seti/neorv32/rtl/core/neorv32_busswitch.vhd Line: 91 Info (12023): Found entity 1: neorv32_busswitch File: /home/seti/neorv32/rtl/core/neorv32_busswitch.vhd Line: 45 Info (12021): Found 2 design units, including 1 entities, in source file /home/seti/neorv32/rtl/core/neorv32_bus_keeper.vhd Info (12022): Found design unit 1: neorv32_bus_keeper-neorv32_bus_keeper_rtl File: /home/seti/neorv32/rtl/core/neorv32_bus_keeper.vhd Line: 70 Info (12023): Found entity 1: neorv32_bus_keeper File: /home/seti/neorv32/rtl/core/neorv32_bus_keeper.vhd Line: 46 Info (12021): Found 1 design units, including 0 entities, in source file /home/seti/neorv32/rtl/core/neorv32_bootloader_image.vhd Info (12022): Found design unit 1: neorv32_bootloader_image-body File: /home/seti/neorv32/rtl/core/neorv32_bootloader_image.vhd Line: 8 Info (12021): Found 2 design units, including 1 entities, in source file /home/seti/neorv32/rtl/core/neorv32_boot_rom.vhd Info (12022): Found design unit 1: neorv32_boot_rom-neorv32_boot_rom_rtl File: /home/seti/neorv32/rtl/core/neorv32_boot_rom.vhd Line: 58 Info (12023): Found entity 1: neorv32_boot_rom File: /home/seti/neorv32/rtl/core/neorv32_boot_rom.vhd Line: 43 Info (12021): Found 1 design units, including 0 entities, in source file /home/seti/neorv32/rtl/core/neorv32_application_image.vhd Info (12022): Found design unit 1: neorv32_application_image-body File: /home/seti/neorv32/rtl/core/neorv32_application_image.vhd Line: 8 Info (12127): Elaborating entity "neorv32_test_setup_approm" for the top level hierarchy Info (12128): Elaborating entity "neorv32_top" for hierarchy "neorv32_top:neorv32_top_inst" File: /home/seti/neorv32/rtl/test_setups/neorv32_test_setup_approm.vhd Line: 66 Warning (10036): Verilog HDL or VHDL warning at neorv32_top.vhd(254): object "rstn_ext" assigned a value but never read File: /home/seti/neorv32/rtl/core/neorv32_top.vhd Line: 254 Warning (10036): Verilog HDL or VHDL warning at neorv32_top.vhd(261): object "clk_gen" assigned a value but never read File: /home/seti/neorv32/rtl/core/neorv32_top.vhd Line: 261 Warning (10036): Verilog HDL or VHDL warning at neorv32_top.vhd(282): object "cpu_s" assigned a value but never read File: /home/seti/neorv32/rtl/core/neorv32_top.vhd Line: 282 Warning (10036): Verilog HDL or VHDL warning at neorv32_top.vhd(388): object "xip_enable" assigned a value but never read File: /home/seti/neorv32/rtl/core/neorv32_top.vhd Line: 388 Warning (10036): Verilog HDL or VHDL warning at neorv32_top.vhd(389): object "xip_page" assigned a value but never read File: /home/seti/neorv32/rtl/core/neorv32_top.vhd Line: 389 Info (10544): VHDL Assertion Statement at neorv32_top.vhd(395): assertion is false - report "NEORV32 PROCESSOR CONFIG NOTE: Peripherals = GPIO MTIME " (NOTE) File: /home/seti/neorv32/rtl/core/neorv32_top.vhd Line: 395 Info (10544): VHDL Assertion Statement at neorv32_top.vhd(422): assertion is false - report "NEORV32 PROCESSOR CONFIG NOTE: Boot configuration = direct boot from memory (processor-internal IMEM)." (NOTE) File: /home/seti/neorv32/rtl/core/neorv32_top.vhd Line: 422 Info (12128): Elaborating entity "neorv32_cpu" for hierarchy "neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst" File: /home/seti/neorv32/rtl/core/neorv32_top.vhd Line: 542 Info (10544): VHDL Assertion Statement at neorv32_cpu.vhd(165): assertion is false - report "The NEORV32 RISC-V Processor - github.com/stnolting/neorv32" (NOTE) File: /home/seti/neorv32/rtl/core/neorv32_cpu.vhd Line: 165 Info (10544): VHDL Assertion Statement at neorv32_cpu.vhd(168): assertion is false - report "NEORV32 CPU CONFIG NOTE: Core ISA ('MARCH') = RV32IMC_Zicsr_Zicntr" (NOTE) File: /home/seti/neorv32/rtl/core/neorv32_cpu.vhd Line: 168 Info (10544): VHDL Assertion Statement at neorv32_cpu.vhd(190): assertion is false - report "NEORV32 CPU NOTE: Assuming this is real hardware." (NOTE) File: /home/seti/neorv32/rtl/core/neorv32_cpu.vhd Line: 190 Info (10544): VHDL Assertion Statement at neorv32_cpu.vhd(200): assertion is false - report "NEORV32 CPU CONFIG NOTE: Boot from address 0x00000000." (NOTE) File: /home/seti/neorv32/rtl/core/neorv32_cpu.vhd Line: 200 Warning (10651): VHDL Assertion Statement at neorv32_cpu.vhd(214): assertion is false - report "NEORV32 CPU CONFIG WARNING! Overriding configuration (setting =2) because C ISA extension is enabled." (WARNING) File: /home/seti/neorv32/rtl/core/neorv32_cpu.vhd Line: 214 Info (12128): Elaborating entity "neorv32_cpu_control" for hierarchy "neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst" File: /home/seti/neorv32/rtl/core/neorv32_cpu.vhd Line: 260 Warning (10445): VHDL Subtype or Type Declaration warning at neorv32_cpu_control.vhd(249): subtype or type has null range File: /home/seti/neorv32/rtl/core/neorv32_cpu_control.vhd Line: 249 Warning (10445): VHDL Subtype or Type Declaration warning at neorv32_cpu_control.vhd(251): subtype or type has null range File: /home/seti/neorv32/rtl/core/neorv32_cpu_control.vhd Line: 251 Warning (10445): VHDL Subtype or Type Declaration warning at neorv32_cpu_control.vhd(253): subtype or type has null range File: /home/seti/neorv32/rtl/core/neorv32_cpu_control.vhd Line: 253 Warning (10445): VHDL Subtype or Type Declaration warning at neorv32_cpu_control.vhd(255): subtype or type has null range File: /home/seti/neorv32/rtl/core/neorv32_cpu_control.vhd Line: 255 Warning (10445): VHDL Subtype or Type Declaration warning at neorv32_cpu_control.vhd(257): subtype or type has null range File: /home/seti/neorv32/rtl/core/neorv32_cpu_control.vhd Line: 257 Warning (10445): VHDL Subtype or Type Declaration warning at neorv32_cpu_control.vhd(365): subtype or type has null range File: /home/seti/neorv32/rtl/core/neorv32_cpu_control.vhd Line: 365 Warning (10037): Verilog HDL or VHDL warning at neorv32_cpu_control.vhd(1143): conditional expression evaluates to a constant File: /home/seti/neorv32/rtl/core/neorv32_cpu_control.vhd Line: 1143 Warning (10631): VHDL Process Statement warning at neorv32_cpu_control.vhd(1686): inferring latch(es) for signal or variable "csr", which holds its previous value in one or more paths through the process File: /home/seti/neorv32/rtl/core/neorv32_cpu_control.vhd Line: 1686 Warning (10445): VHDL Subtype or Type Declaration warning at neorv32_cpu_control.vhd(2074): subtype or type has null range File: /home/seti/neorv32/rtl/core/neorv32_cpu_control.vhd Line: 2074 Warning (10445): VHDL Subtype or Type Declaration warning at neorv32_cpu_control.vhd(2480): subtype or type has null range File: /home/seti/neorv32/rtl/core/neorv32_cpu_control.vhd Line: 2480 Warning (10445): VHDL Subtype or Type Declaration warning at neorv32_cpu_control.vhd(2517): subtype or type has null range File: /home/seti/neorv32/rtl/core/neorv32_cpu_control.vhd Line: 2517 Warning (10296): VHDL warning at neorv32_cpu_control.vhd(2550): ignored assignment of value to null range File: /home/seti/neorv32/rtl/core/neorv32_cpu_control.vhd Line: 2550 Info (12128): Elaborating entity "neorv32_fifo" for hierarchy "neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|neorv32_fifo:\prefetch_buffer:0:prefetch_buffer_inst" File: /home/seti/neorv32/rtl/core/neorv32_cpu_control.vhd Line: 494 Info (12128): Elaborating entity "neorv32_cpu_decompressor" for hierarchy "neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|neorv32_cpu_decompressor:\neorv32_cpu_decompressor_inst_true:neorv32_cpu_decompressor_inst" File: /home/seti/neorv32/rtl/core/neorv32_cpu_control.vhd Line: 591 Info (12128): Elaborating entity "neorv32_cpu_regfile" for hierarchy "neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_regfile:neorv32_cpu_regfile_inst" File: /home/seti/neorv32/rtl/core/neorv32_cpu.vhd Line: 351 Info (19000): Inferred 2 megafunctions from design logic Info (276029): Inferred altsyncram megafunction from the following design logic: "neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_regfile:neorv32_cpu_regfile_inst|altsyncram:reg_file[0][31]__1" Info (286033): Parameter OPERATION_MODE set to DUAL_PORT Info (286033): Parameter WIDTH_A set to 32 Info (286033): Parameter WIDTHAD_A set to 5 Info (286033): Parameter NUMWORDS_A set to 32 Info (286033): Parameter WIDTH_B set to 32 Info (286033): Parameter WIDTHAD_B set to 5 Info (286033): Parameter NUMWORDS_B set to 32 Info (286033): Parameter ADDRESS_ACLR_A set to NONE Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED Info (286033): Parameter ADDRESS_ACLR_B set to NONE Info (286033): Parameter OUTDATA_ACLR_B set to NONE Info (286033): Parameter ADDRESS_REG_B set to CLOCK0 Info (286033): Parameter INDATA_ACLR_A set to NONE Info (286033): Parameter WRCONTROL_ACLR_A set to NONE Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA Info (276029): Inferred altsyncram megafunction from the following design logic: "neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_regfile:neorv32_cpu_regfile_inst|altsyncram:reg_file[0][31]__2" Info (286033): Parameter OPERATION_MODE set to DUAL_PORT Info (286033): Parameter WIDTH_A set to 32 Info (286033): Parameter WIDTHAD_A set to 5 Info (286033): Parameter NUMWORDS_A set to 32 Info (286033): Parameter WIDTH_B set to 32 Info (286033): Parameter WIDTHAD_B set to 5 Info (286033): Parameter NUMWORDS_B set to 32 Info (286033): Parameter ADDRESS_ACLR_A set to NONE Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED Info (286033): Parameter ADDRESS_ACLR_B set to NONE Info (286033): Parameter OUTDATA_ACLR_B set to NONE Info (286033): Parameter ADDRESS_REG_B set to CLOCK0 Info (286033): Parameter INDATA_ACLR_A set to NONE Info (286033): Parameter WRCONTROL_ACLR_A set to NONE Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA Info (12128): Elaborating entity "altsyncram" for hierarchy "neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_regfile:neorv32_cpu_regfile_inst|altsyncram:reg_file[0][31]__1" Info (12130): Elaborated megafunction instantiation "neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_regfile:neorv32_cpu_regfile_inst|altsyncram:reg_file[0][31]__1" Info (12133): Instantiated megafunction "neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_regfile:neorv32_cpu_regfile_inst|altsyncram:reg_file[0][31]__1" with the following parameter: Info (12134): Parameter "OPERATION_MODE" = "DUAL_PORT" Info (12134): Parameter "WIDTH_A" = "32" Info (12134): Parameter "WIDTHAD_A" = "5" Info (12134): Parameter "NUMWORDS_A" = "32" Info (12134): Parameter "WIDTH_B" = "32" Info (12134): Parameter "WIDTHAD_B" = "5" Info (12134): Parameter "NUMWORDS_B" = "32" Info (12134): Parameter "ADDRESS_ACLR_A" = "NONE" Info (12134): Parameter "OUTDATA_REG_B" = "UNREGISTERED" Info (12134): Parameter "ADDRESS_ACLR_B" = "NONE" Info (12134): Parameter "OUTDATA_ACLR_B" = "NONE" Info (12134): Parameter "ADDRESS_REG_B" = "CLOCK0" Info (12134): Parameter "INDATA_ACLR_A" = "NONE" Info (12134): Parameter "WRCONTROL_ACLR_A" = "NONE" Info (12134): Parameter "READ_DURING_WRITE_MODE_MIXED_PORTS" = "OLD_DATA" Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_u2n1.tdf Info (12023): Found entity 1: altsyncram_u2n1 File: /home/seti/quartus_project/db/altsyncram_u2n1.tdf Line: 28 Info (12128): Elaborating entity "altsyncram_u2n1" for hierarchy "neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_regfile:neorv32_cpu_regfile_inst|altsyncram:reg_file[0][31]__1|altsyncram_u2n1:auto_generated" File: /home/seti/intelFPGA/22.1std/quartus/libraries/megafunctions/altsyncram.tdf Line: 792 Info (12128): Elaborating entity "neorv32_cpu_alu" for hierarchy "neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_alu:neorv32_cpu_alu_inst" File: /home/seti/neorv32/rtl/core/neorv32_cpu.vhd Line: 377 Info (12128): Elaborating entity "neorv32_cpu_cp_shifter" for hierarchy "neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_alu:neorv32_cpu_alu_inst|neorv32_cpu_cp_shifter:neorv32_cpu_cp_shifter_inst" File: /home/seti/neorv32/rtl/core/neorv32_cpu_alu.vhd Line: 174 Info (12128): Elaborating entity "neorv32_cpu_cp_muldiv" for hierarchy "neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_alu:neorv32_cpu_alu_inst|neorv32_cpu_cp_muldiv:\neorv32_cpu_cp_muldiv_inst_true:neorv32_cpu_cp_muldiv_inst" File: /home/seti/neorv32/rtl/core/neorv32_cpu_alu.vhd Line: 198 Info (12128): Elaborating entity "neorv32_cpu_bus" for hierarchy "neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_bus:neorv32_cpu_bus_inst" File: /home/seti/neorv32/rtl/core/neorv32_cpu.vhd Line: 414 Warning (10445): VHDL Subtype or Type Declaration warning at neorv32_cpu_bus.vhd(114): subtype or type has null range File: /home/seti/neorv32/rtl/core/neorv32_cpu_bus.vhd Line: 114 Warning (10445): VHDL Subtype or Type Declaration warning at neorv32_cpu_bus.vhd(115): subtype or type has null range File: /home/seti/neorv32/rtl/core/neorv32_cpu_bus.vhd Line: 115 Warning (10445): VHDL Subtype or Type Declaration warning at neorv32_cpu_bus.vhd(116): subtype or type has null range File: /home/seti/neorv32/rtl/core/neorv32_cpu_bus.vhd Line: 116 Warning (10445): VHDL Subtype or Type Declaration warning at neorv32_cpu_bus.vhd(117): subtype or type has null range File: /home/seti/neorv32/rtl/core/neorv32_cpu_bus.vhd Line: 117 Warning (10445): VHDL Subtype or Type Declaration warning at neorv32_cpu_bus.vhd(118): subtype or type has null range File: /home/seti/neorv32/rtl/core/neorv32_cpu_bus.vhd Line: 118 Warning (10445): VHDL Subtype or Type Declaration warning at neorv32_cpu_bus.vhd(119): subtype or type has null range File: /home/seti/neorv32/rtl/core/neorv32_cpu_bus.vhd Line: 119 Warning (10445): VHDL Subtype or Type Declaration warning at neorv32_cpu_bus.vhd(120): subtype or type has null range File: /home/seti/neorv32/rtl/core/neorv32_cpu_bus.vhd Line: 120 Warning (10445): VHDL Subtype or Type Declaration warning at neorv32_cpu_bus.vhd(121): subtype or type has null range File: /home/seti/neorv32/rtl/core/neorv32_cpu_bus.vhd Line: 121 Warning (10445): VHDL Subtype or Type Declaration warning at neorv32_cpu_bus.vhd(122): subtype or type has null range File: /home/seti/neorv32/rtl/core/neorv32_cpu_bus.vhd Line: 122 Warning (10445): VHDL Subtype or Type Declaration warning at neorv32_cpu_bus.vhd(427): subtype or type has null range File: /home/seti/neorv32/rtl/core/neorv32_cpu_bus.vhd Line: 427 Warning (10445): VHDL Subtype or Type Declaration warning at neorv32_cpu_bus.vhd(446): subtype or type has null range File: /home/seti/neorv32/rtl/core/neorv32_cpu_bus.vhd Line: 446 Warning (10445): VHDL Subtype or Type Declaration warning at neorv32_cpu_bus.vhd(467): subtype or type has null range File: /home/seti/neorv32/rtl/core/neorv32_cpu_bus.vhd Line: 467 Warning (10445): VHDL Subtype or Type Declaration warning at neorv32_cpu_bus.vhd(500): subtype or type has null range File: /home/seti/neorv32/rtl/core/neorv32_cpu_bus.vhd Line: 500 Info (12128): Elaborating entity "neorv32_busswitch" for hierarchy "neorv32_top:neorv32_top_inst|neorv32_busswitch:neorv32_busswitch_inst" File: /home/seti/neorv32/rtl/core/neorv32_top.vhd Line: 691 Info (12128): Elaborating entity "neorv32_bus_keeper" for hierarchy "neorv32_top:neorv32_top_inst|neorv32_bus_keeper:neorv32_bus_keeper_inst" File: /home/seti/neorv32/rtl/core/neorv32_top.vhd Line: 763 Info (12128): Elaborating entity "neorv32_imem" for hierarchy "neorv32_top:neorv32_top_inst|neorv32_imem:\neorv32_int_imem_inst_true:neorv32_int_imem_inst" File: /home/seti/neorv32/rtl/core/neorv32_top.vhd Line: 799 Info (10544): VHDL Assertion Statement at neorv32_imem.default.vhd(89): assertion is false - report "NEORV32 PROCESSOR CONFIG NOTE: Using DEFAULT platform-agnostic IMEM." (NOTE) File: /home/seti/neorv32/rtl/core/mem/neorv32_imem.default.vhd Line: 89 Info (10544): VHDL Assertion Statement at neorv32_imem.default.vhd(92): assertion is false - report "NEORV32 PROCESSOR CONFIG NOTE: Implementing processor-internal IMEM as ROM (16384 bytes), pre-initialized with application (1076 bytes)." (NOTE) File: /home/seti/neorv32/rtl/core/mem/neorv32_imem.default.vhd Line: 92 Info (12128): Elaborating entity "neorv32_dmem" for hierarchy "neorv32_top:neorv32_top_inst|neorv32_dmem:\neorv32_int_dmem_inst_true:neorv32_int_dmem_inst" File: /home/seti/neorv32/rtl/core/neorv32_top.vhd Line: 828 Info (10544): VHDL Assertion Statement at neorv32_dmem.default.vhd(72): assertion is false - report "NEORV32 PROCESSOR CONFIG NOTE: Using DEFAULT platform-agnostic DMEM." (NOTE) File: /home/seti/neorv32/rtl/core/mem/neorv32_dmem.default.vhd Line: 72 Info (10544): VHDL Assertion Statement at neorv32_dmem.default.vhd(75): assertion is false - report "NEORV32 PROCESSOR CONFIG NOTE: Implementing processor-internal DMEM (RAM, 8192 bytes)." (NOTE) File: /home/seti/neorv32/rtl/core/mem/neorv32_dmem.default.vhd Line: 75 Info (12128): Elaborating entity "neorv32_gpio" for hierarchy "neorv32_top:neorv32_top_inst|neorv32_gpio:\neorv32_gpio_inst_true:neorv32_gpio_inst" File: /home/seti/neorv32/rtl/core/neorv32_top.vhd Line: 1059 Info (12128): Elaborating entity "neorv32_mtime" for hierarchy "neorv32_top:neorv32_top_inst|neorv32_mtime:\neorv32_mtime_inst_true:neorv32_mtime_inst" File: /home/seti/neorv32/rtl/core/neorv32_top.vhd Line: 1128 Info (12128): Elaborating entity "neorv32_sysinfo" for hierarchy "neorv32_top:neorv32_top_inst|neorv32_sysinfo:neorv32_sysinfo_inst" File: /home/seti/neorv32/rtl/core/neorv32_top.vhd Line: 1605 Info (286030): Timing-Driven Synthesis is running Info (19000): Inferred 4 megafunctions from design logic Info (276029): Inferred altsyncram megafunction from the following design logic: "neorv32_top:neorv32_top_inst|neorv32_dmem:\neorv32_int_dmem_inst_true:neorv32_int_dmem_inst|mem_ram_b0_rtl_0" Info (286033): Parameter OPERATION_MODE set to DUAL_PORT Info (286033): Parameter WIDTH_A set to 8 Info (286033): Parameter WIDTHAD_A set to 11 Info (286033): Parameter NUMWORDS_A set to 2048 Info (286033): Parameter WIDTH_B set to 8 Info (286033): Parameter WIDTHAD_B set to 11 Info (286033): Parameter NUMWORDS_B set to 2048 Info (286033): Parameter ADDRESS_ACLR_A set to NONE Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED Info (286033): Parameter ADDRESS_ACLR_B set to NONE Info (286033): Parameter OUTDATA_ACLR_B set to NONE Info (286033): Parameter ADDRESS_REG_B set to CLOCK0 Info (286033): Parameter INDATA_ACLR_A set to NONE Info (286033): Parameter WRCONTROL_ACLR_A set to NONE Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA Info (286033): Parameter RDCONTROL_REG_B set to CLOCK0 Info (276029): Inferred altsyncram megafunction from the following design logic: "neorv32_top:neorv32_top_inst|neorv32_dmem:\neorv32_int_dmem_inst_true:neorv32_int_dmem_inst|mem_ram_b1_rtl_0" Info (286033): Parameter OPERATION_MODE set to DUAL_PORT Info (286033): Parameter WIDTH_A set to 8 Info (286033): Parameter WIDTHAD_A set to 11 Info (286033): Parameter NUMWORDS_A set to 2048 Info (286033): Parameter WIDTH_B set to 8 Info (286033): Parameter WIDTHAD_B set to 11 Info (286033): Parameter NUMWORDS_B set to 2048 Info (286033): Parameter ADDRESS_ACLR_A set to NONE Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED Info (286033): Parameter ADDRESS_ACLR_B set to NONE Info (286033): Parameter OUTDATA_ACLR_B set to NONE Info (286033): Parameter ADDRESS_REG_B set to CLOCK0 Info (286033): Parameter INDATA_ACLR_A set to NONE Info (286033): Parameter WRCONTROL_ACLR_A set to NONE Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA Info (286033): Parameter RDCONTROL_REG_B set to CLOCK0 Info (276029): Inferred altsyncram megafunction from the following design logic: "neorv32_top:neorv32_top_inst|neorv32_dmem:\neorv32_int_dmem_inst_true:neorv32_int_dmem_inst|mem_ram_b2_rtl_0" Info (286033): Parameter OPERATION_MODE set to DUAL_PORT Info (286033): Parameter WIDTH_A set to 8 Info (286033): Parameter WIDTHAD_A set to 11 Info (286033): Parameter NUMWORDS_A set to 2048 Info (286033): Parameter WIDTH_B set to 8 Info (286033): Parameter WIDTHAD_B set to 11 Info (286033): Parameter NUMWORDS_B set to 2048 Info (286033): Parameter ADDRESS_ACLR_A set to NONE Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED Info (286033): Parameter ADDRESS_ACLR_B set to NONE Info (286033): Parameter OUTDATA_ACLR_B set to NONE Info (286033): Parameter ADDRESS_REG_B set to CLOCK0 Info (286033): Parameter INDATA_ACLR_A set to NONE Info (286033): Parameter WRCONTROL_ACLR_A set to NONE Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA Info (286033): Parameter RDCONTROL_REG_B set to CLOCK0 Info (276029): Inferred altsyncram megafunction from the following design logic: "neorv32_top:neorv32_top_inst|neorv32_dmem:\neorv32_int_dmem_inst_true:neorv32_int_dmem_inst|mem_ram_b3_rtl_0" Info (286033): Parameter OPERATION_MODE set to DUAL_PORT Info (286033): Parameter WIDTH_A set to 8 Info (286033): Parameter WIDTHAD_A set to 11 Info (286033): Parameter NUMWORDS_A set to 2048 Info (286033): Parameter WIDTH_B set to 8 Info (286033): Parameter WIDTHAD_B set to 11 Info (286033): Parameter NUMWORDS_B set to 2048 Info (286033): Parameter ADDRESS_ACLR_A set to NONE Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED Info (286033): Parameter ADDRESS_ACLR_B set to NONE Info (286033): Parameter OUTDATA_ACLR_B set to NONE Info (286033): Parameter ADDRESS_REG_B set to CLOCK0 Info (286033): Parameter INDATA_ACLR_A set to NONE Info (286033): Parameter WRCONTROL_ACLR_A set to NONE Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA Info (286033): Parameter RDCONTROL_REG_B set to CLOCK0 Info (12130): Elaborated megafunction instantiation "neorv32_top:neorv32_top_inst|neorv32_dmem:\neorv32_int_dmem_inst_true:neorv32_int_dmem_inst|altsyncram:mem_ram_b0_rtl_0" Info (12133): Instantiated megafunction "neorv32_top:neorv32_top_inst|neorv32_dmem:\neorv32_int_dmem_inst_true:neorv32_int_dmem_inst|altsyncram:mem_ram_b0_rtl_0" with the following parameter: Info (12134): Parameter "OPERATION_MODE" = "DUAL_PORT" Info (12134): Parameter "WIDTH_A" = "8" Info (12134): Parameter "WIDTHAD_A" = "11" Info (12134): Parameter "NUMWORDS_A" = "2048" Info (12134): Parameter "WIDTH_B" = "8" Info (12134): Parameter "WIDTHAD_B" = "11" Info (12134): Parameter "NUMWORDS_B" = "2048" Info (12134): Parameter "ADDRESS_ACLR_A" = "NONE" Info (12134): Parameter "OUTDATA_REG_B" = "UNREGISTERED" Info (12134): Parameter "ADDRESS_ACLR_B" = "NONE" Info (12134): Parameter "OUTDATA_ACLR_B" = "NONE" Info (12134): Parameter "ADDRESS_REG_B" = "CLOCK0" Info (12134): Parameter "INDATA_ACLR_A" = "NONE" Info (12134): Parameter "WRCONTROL_ACLR_A" = "NONE" Info (12134): Parameter "READ_DURING_WRITE_MODE_MIXED_PORTS" = "OLD_DATA" Info (12134): Parameter "RDCONTROL_REG_B" = "CLOCK0" Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_c6q1.tdf Info (12023): Found entity 1: altsyncram_c6q1 File: /home/seti/quartus_project/db/altsyncram_c6q1.tdf Line: 28 Warning (12241): 1 hierarchies have connectivity warnings - see the Connectivity Checks report folder Info (17049): 45 registers lost all their fanouts during netlist optimizations. Info (16010): Generating hard_block partition "hard_block:auto_generated_inst" Info (16011): Adding 0 node(s), including 0 DDIO, 0 PLL, 0 transceiver and 0 LCELL Info (21057): Implemented 3009 device resources after synthesis - the final resource count might be different Info (21058): Implemented 2 input pins Info (21059): Implemented 8 output pins Info (21061): Implemented 2903 logic cells Info (21064): Implemented 96 RAM segments Info: Quartus Prime Analysis & Synthesis was successful. 0 errors, 33 warnings Info: Peak virtual memory: 632 megabytes Info: Processing ended: Wed Feb 8 15:41:39 2023 Info: Elapsed time: 00:00:18 Info: Total CPU time (on all processors): 00:00:23