-- ################################################################################################# -- # << NEORV32 - Processor-internal instruction memory (IMEM) >> # -- # ********************************************************************************************* # -- # This version is intended for SIMULATION ONLY! # -- # It only allows an implementation as ROM and is initialized using "application_init_image". # -- # Optimized for simulation to allow LARGE read-only IMEMs. # -- # ********************************************************************************************* # -- # BSD 3-Clause License # -- # # -- # Copyright (c) 2022, Stephan Nolting. All rights reserved. # -- # # -- # Redistribution and use in source and binary forms, with or without modification, are # -- # permitted provided that the following conditions are met: # -- # # -- # 1. Redistributions of source code must retain the above copyright notice, this list of # -- # conditions and the following disclaimer. # -- # # -- # 2. Redistributions in binary form must reproduce the above copyright notice, this list of # -- # conditions and the following disclaimer in the documentation and/or other materials # -- # provided with the distribution. # -- # # -- # 3. Neither the name of the copyright holder nor the names of its contributors may be used to # -- # endorse or promote products derived from this software without specific prior written # -- # permission. # -- # # -- # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS # -- # OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF # -- # MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE # -- # COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, # -- # EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE # -- # GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED # -- # AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING # -- # NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED # -- # OF THE POSSIBILITY OF SUCH DAMAGE. # -- # ********************************************************************************************* # -- # The NEORV32 Processor - https://github.com/stnolting/neorv32 (c) Stephan Nolting # -- ################################################################################################# library ieee; use ieee.std_logic_1164.all; use ieee.numeric_std.all; library neorv32; use neorv32.neorv32_package.all; use neorv32.neorv32_application_image.all; -- this file is generated by the image generator architecture neorv32_imem_rtl of neorv32_imem is -- IO space: module base address -- constant hi_abb_c : natural := 31; -- high address boundary bit constant lo_abb_c : natural := index_size_f(IMEM_SIZE); -- low address boundary bit -- local signals -- signal acc_en : std_ulogic; signal rdata : std_ulogic_vector(31 downto 0); signal rden : std_ulogic; signal addr : std_ulogic_vector(index_size_f(IMEM_SIZE/4)-1 downto 0); begin -- Sanity Checks -------------------------------------------------------------------------- -- ------------------------------------------------------------------------------------------- assert false report "NEORV32 PROCESSOR CONFIG NOTE: Implementing processor-internal [SIM-only!] IMEM as ROM (" & natural'image(IMEM_SIZE) & " bytes), pre-initialized with application (" & natural'image(application_init_image'length * 4) & " bytes)." severity note; assert not (IMEM_AS_IROM = false) report "NEORV32 PROCESSOR CONFIG ERROR! Simulation-optimized IMEM can only be used as pre-initialized ROM!" severity error; -- Access Control ------------------------------------------------------------------------- -- ------------------------------------------------------------------------------------------- acc_en <= '1' when (addr_i(hi_abb_c downto lo_abb_c) = IMEM_BASE(hi_abb_c downto lo_abb_c)) else '0'; addr <= addr_i(index_size_f(IMEM_SIZE/4)+1 downto 2); -- word aligned -- Memory Access -------------------------------------------------------------------------- -- ------------------------------------------------------------------------------------------- imem_file_access: process(clk_i) variable addr_v : integer range 0 to (IMEM_SIZE/4)-1; begin if rising_edge(clk_i) then rden <= acc_en and rden_i; ack_o <= acc_en and rden_i; err_o <= acc_en and wren_i; addr_v := to_integer(unsigned(addr)); -- rdata <= (others => '0'); if (addr_v <= application_init_image'length) then rdata <= application_init_image(addr_v); end if; end if; end process imem_file_access; -- output gate -- data_o <= rdata when (rden = '1') else (others => '0'); end neorv32_imem_rtl;