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193 lines
9.5 KiB
XML
193 lines
9.5 KiB
XML
<profile>
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<section name = "Vivado HLS Report for 'ConvertScaleAbs155'" level="0">
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<item name = "Date">Tue Feb 7 10:18:44 2023
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</item>
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<item name = "Version">2019.1 (Build 2552052 on Fri May 24 15:28:33 MDT 2019)</item>
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<item name = "Project">edge_detect</item>
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<item name = "Solution">solution1</item>
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<item name = "Product family">zynq</item>
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<item name = "Target device">xc7z020-clg400-1</item>
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</section>
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<section name = "Performance Estimates" level="0">
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<item name = "Timing (ns)">
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<section name = "" level="1">
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<item name = "Summary"><table name="" hasTotal="0">
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<keys size="4">Clock, Target, Estimated, Uncertainty</keys>
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<column name="ap_clk">6.70, 6.562, 0.84</column>
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</table>
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</item>
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</section>
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</item>
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<item name = "Latency (clock cycles)">
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<section name = "" level="1">
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<item name = "Summary"><table name="" hasTotal="0">
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<keys size="6">, min, max, min, max, Type</keys>
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<column name="">2094121, 2094121, 2094121, 2094121, none</column>
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</table>
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</item>
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<item name = "Detail">
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<section name = "" level="1">
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<item name = "Instance"><table name="" hasTotal="0">
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<keys size="7">Instance, Module, min, max, min, max, Type</keys>
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<column name="grp_operator_1_fu_131">operator_1, 5, 5, 1, 1, function</column>
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<column name="grp_operator_1_fu_136">operator_1, 5, 5, 1, 1, function</column>
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<column name="grp_operator_1_fu_141">operator_1, 5, 5, 1, 1, function</column>
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</table>
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</item>
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<item name = "Loop"><table name="" hasTotal="0">
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<keys size="8">Loop Name, min, max, Latency, achieved, target, Count, Pipelined</keys>
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<column name="- loop_height">2094120, 2094120, 1939, -, -, 1080, no</column>
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<column name=" + loop_width">1936, 1936, 18, 1, 1, 1920, yes</column>
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</table>
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</item>
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</section>
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</item>
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</section>
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</item>
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</section>
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<section name = "Utilization Estimates" level="0">
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<item name = "Summary"><table name="" hasTotal="1">
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<keys size="6">Name, BRAM_18K, DSP48E, FF, LUT, URAM</keys>
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<column name="DSP">-, -, -, -, -</column>
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<column name="Expression">-, -, 0, 64, -</column>
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<column name="FIFO">-, -, -, -, -</column>
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<column name="Instance">0, 0, 4923, 6591, -</column>
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<column name="Memory">-, -, -, -, -</column>
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<column name="Multiplexer">-, -, -, 126, -</column>
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<column name="Register">0, -, 358, 32, -</column>
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<specialColumn name="Available">280, 220, 106400, 53200, 0</specialColumn>
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<specialColumn name="Utilization (%)">0, 0, 4, 12, 0</specialColumn>
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</table>
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</item>
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<item name = "Detail">
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<section name = "" level="1">
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<item name = "Instance"><table name="" hasTotal="1">
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<keys size="7">Instance, Module, BRAM_18K, DSP48E, FF, LUT, URAM</keys>
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<column name="edge_detect_sitodocq_U71">edge_detect_sitodocq, 0, 0, 549, 625, 0</column>
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<column name="edge_detect_sitodocq_U72">edge_detect_sitodocq, 0, 0, 549, 625, 0</column>
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<column name="edge_detect_sitodocq_U73">edge_detect_sitodocq, 0, 0, 549, 625, 0</column>
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<column name="grp_operator_1_fu_131">operator_1, 0, 0, 1092, 1572, 0</column>
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<column name="grp_operator_1_fu_136">operator_1, 0, 0, 1092, 1572, 0</column>
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<column name="grp_operator_1_fu_141">operator_1, 0, 0, 1092, 1572, 0</column>
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</table>
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</item>
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<item name = "DSP48E"><table name="" hasTotal="0">
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<keys size="3">Instance, Module, Expression</keys>
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</table>
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</item>
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<item name = "Memory"><table name="" hasTotal="1">
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<keys size="10">Memory, Module, BRAM_18K, FF, LUT, URAM, Words, Bits, Banks, W*Bits*Banks</keys>
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</table>
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</item>
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<item name = "FIFO"><table name="" hasTotal="1">
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<keys size="8">Name, BRAM_18K, FF, LUT, URAM, Depth, Bits, Size:D*B</keys>
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</table>
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</item>
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<item name = "Expression"><table name="" hasTotal="1">
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<keys size="7">Variable Name, Operation, DSP48E, FF, LUT, Bitwidth P0, Bitwidth P1</keys>
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<column name="i_fu_161_p2">+, 0, 0, 13, 11, 1</column>
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<column name="j_fu_173_p2">+, 0, 0, 13, 11, 1</column>
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<column name="icmp_ln2526_fu_155_p2">icmp, 0, 0, 13, 11, 11</column>
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<column name="icmp_ln2527_fu_167_p2">icmp, 0, 0, 13, 11, 9</column>
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<column name="ap_block_pp0_stage0_01001">or, 0, 0, 2, 1, 1</column>
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<column name="ap_block_state1">or, 0, 0, 2, 1, 1</column>
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<column name="ap_block_state20_pp0_stage0_iter17">or, 0, 0, 2, 1, 1</column>
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<column name="ap_block_state4_pp0_stage0_iter1">or, 0, 0, 2, 1, 1</column>
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<column name="ap_enable_pp0">xor, 0, 0, 2, 1, 2</column>
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<column name="ap_enable_reg_pp0_iter1">xor, 0, 0, 2, 2, 1</column>
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</table>
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</item>
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<item name = "Multiplexer"><table name="" hasTotal="1">
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<keys size="5">Name, LUT, Input Size, Bits, Total Bits</keys>
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<column name="ap_NS_fsm">27, 5, 1, 5</column>
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<column name="ap_done">9, 2, 1, 2</column>
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<column name="ap_enable_reg_pp0_iter1">9, 2, 1, 2</column>
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<column name="ap_enable_reg_pp0_iter17">9, 2, 1, 2</column>
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<column name="i_0_reg_109">9, 2, 11, 22</column>
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<column name="j_0_reg_120">9, 2, 11, 22</column>
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<column name="p_dst_data_stream_V3_blk_n">9, 2, 1, 2</column>
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<column name="p_dst_data_stream_V4_blk_n">9, 2, 1, 2</column>
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<column name="p_dst_data_stream_V_blk_n">9, 2, 1, 2</column>
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<column name="p_src_data_stream_V1_blk_n">9, 2, 1, 2</column>
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<column name="p_src_data_stream_V2_blk_n">9, 2, 1, 2</column>
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<column name="p_src_data_stream_V_blk_n">9, 2, 1, 2</column>
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</table>
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</item>
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<item name = "Register"><table name="" hasTotal="1">
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<keys size="5">Name, FF, LUT, Bits, Const Bits</keys>
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<column name="ap_CS_fsm">4, 0, 4, 0</column>
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<column name="ap_done_reg">1, 0, 1, 0</column>
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<column name="ap_enable_reg_pp0_iter0">1, 0, 1, 0</column>
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<column name="ap_enable_reg_pp0_iter1">1, 0, 1, 0</column>
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<column name="ap_enable_reg_pp0_iter10">1, 0, 1, 0</column>
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<column name="ap_enable_reg_pp0_iter11">1, 0, 1, 0</column>
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<column name="ap_enable_reg_pp0_iter12">1, 0, 1, 0</column>
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<column name="ap_enable_reg_pp0_iter13">1, 0, 1, 0</column>
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<column name="ap_enable_reg_pp0_iter14">1, 0, 1, 0</column>
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<column name="ap_enable_reg_pp0_iter15">1, 0, 1, 0</column>
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<column name="ap_enable_reg_pp0_iter16">1, 0, 1, 0</column>
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<column name="ap_enable_reg_pp0_iter17">1, 0, 1, 0</column>
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<column name="ap_enable_reg_pp0_iter2">1, 0, 1, 0</column>
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<column name="ap_enable_reg_pp0_iter3">1, 0, 1, 0</column>
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<column name="ap_enable_reg_pp0_iter4">1, 0, 1, 0</column>
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<column name="ap_enable_reg_pp0_iter5">1, 0, 1, 0</column>
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<column name="ap_enable_reg_pp0_iter6">1, 0, 1, 0</column>
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<column name="ap_enable_reg_pp0_iter7">1, 0, 1, 0</column>
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<column name="ap_enable_reg_pp0_iter8">1, 0, 1, 0</column>
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<column name="ap_enable_reg_pp0_iter9">1, 0, 1, 0</column>
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<column name="i_0_reg_109">11, 0, 11, 0</column>
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<column name="i_reg_255">11, 0, 11, 0</column>
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<column name="icmp_ln2527_reg_260">1, 0, 1, 0</column>
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<column name="j_0_reg_120">11, 0, 11, 0</column>
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<column name="p_d_val_0_reg_329">8, 0, 8, 0</column>
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<column name="p_d_val_1_reg_334">8, 0, 8, 0</column>
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<column name="tmp_24_reg_339">8, 0, 8, 0</column>
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<column name="tmp_63_reg_269">8, 0, 8, 0</column>
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<column name="tmp_64_reg_274">8, 0, 8, 0</column>
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<column name="tmp_65_reg_279">8, 0, 8, 0</column>
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<column name="trunc_ln368_3_reg_304">63, 0, 63, 0</column>
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<column name="trunc_ln368_4_reg_309">63, 0, 63, 0</column>
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<column name="trunc_ln368_reg_299">63, 0, 63, 0</column>
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<column name="icmp_ln2527_reg_260">64, 32, 1, 0</column>
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</table>
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</item>
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</section>
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</item>
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</section>
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<section name = "Interface" level="0">
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<item name = "Summary"><table name="" hasTotal="0">
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<keys size="6">RTL Ports, Dir, Bits, Protocol, Source Object, C Type</keys>
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<column name="ap_clk">in, 1, ap_ctrl_hs, ConvertScaleAbs155, return value</column>
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<column name="ap_rst">in, 1, ap_ctrl_hs, ConvertScaleAbs155, return value</column>
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<column name="ap_start">in, 1, ap_ctrl_hs, ConvertScaleAbs155, return value</column>
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<column name="ap_done">out, 1, ap_ctrl_hs, ConvertScaleAbs155, return value</column>
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<column name="ap_continue">in, 1, ap_ctrl_hs, ConvertScaleAbs155, return value</column>
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<column name="ap_idle">out, 1, ap_ctrl_hs, ConvertScaleAbs155, return value</column>
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<column name="ap_ready">out, 1, ap_ctrl_hs, ConvertScaleAbs155, return value</column>
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<column name="p_src_data_stream_V_dout">in, 8, ap_fifo, p_src_data_stream_V, pointer</column>
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<column name="p_src_data_stream_V_empty_n">in, 1, ap_fifo, p_src_data_stream_V, pointer</column>
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<column name="p_src_data_stream_V_read">out, 1, ap_fifo, p_src_data_stream_V, pointer</column>
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<column name="p_src_data_stream_V1_dout">in, 8, ap_fifo, p_src_data_stream_V1, pointer</column>
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<column name="p_src_data_stream_V1_empty_n">in, 1, ap_fifo, p_src_data_stream_V1, pointer</column>
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<column name="p_src_data_stream_V1_read">out, 1, ap_fifo, p_src_data_stream_V1, pointer</column>
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<column name="p_src_data_stream_V2_dout">in, 8, ap_fifo, p_src_data_stream_V2, pointer</column>
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<column name="p_src_data_stream_V2_empty_n">in, 1, ap_fifo, p_src_data_stream_V2, pointer</column>
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<column name="p_src_data_stream_V2_read">out, 1, ap_fifo, p_src_data_stream_V2, pointer</column>
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<column name="p_dst_data_stream_V_din">out, 8, ap_fifo, p_dst_data_stream_V, pointer</column>
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<column name="p_dst_data_stream_V_full_n">in, 1, ap_fifo, p_dst_data_stream_V, pointer</column>
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<column name="p_dst_data_stream_V_write">out, 1, ap_fifo, p_dst_data_stream_V, pointer</column>
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<column name="p_dst_data_stream_V3_din">out, 8, ap_fifo, p_dst_data_stream_V3, pointer</column>
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<column name="p_dst_data_stream_V3_full_n">in, 1, ap_fifo, p_dst_data_stream_V3, pointer</column>
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<column name="p_dst_data_stream_V3_write">out, 1, ap_fifo, p_dst_data_stream_V3, pointer</column>
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<column name="p_dst_data_stream_V4_din">out, 8, ap_fifo, p_dst_data_stream_V4, pointer</column>
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<column name="p_dst_data_stream_V4_full_n">in, 1, ap_fifo, p_dst_data_stream_V4, pointer</column>
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<column name="p_dst_data_stream_V4_write">out, 1, ap_fifo, p_dst_data_stream_V4, pointer</column>
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</table>
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</item>
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</section>
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</profile>
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