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M2_SETI/A2/Detection_cercle/edge_detect/edge_detect/solution1/.autopilot/db/AXIvideo2Mat.verbose.bind.rpt

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================================================================
== Vivado HLS Report for 'AXIvideo2Mat'
================================================================
* Date: Tue Feb 7 10:18:26 2023
* Version: 2019.1 (Build 2552052 on Fri May 24 15:28:33 MDT 2019)
* Project: edge_detect
* Solution: solution1
* Product family: zynq
* Target device: xc7z020-clg400-1
================================================================
== Performance Estimates
================================================================
+ Timing (ns):
* Summary:
+--------+-------+----------+------------+
| Clock | Target| Estimated| Uncertainty|
+--------+-------+----------+------------+
|ap_clk | 6.70| 2.931| 0.84|
+--------+-------+----------+------------+
+ Latency (clock cycles):
* Summary:
+---------+---------+---------+---------+---------+
| Latency | Interval | Pipeline|
| min | max | min | max | Type |
+---------+---------+---------+---------+---------+
| 2079003| 2079003| 2079003| 2079003| none |
+---------+---------+---------+---------+---------+
+ Detail:
* Instance:
N/A
* Loop:
+-----------------------+---------+---------+----------+-----------+-----------+------+----------+
| | Latency | Iteration| Initiation Interval | Trip | |
| Loop Name | min | max | Latency | achieved | target | Count| Pipelined|
+-----------------------+---------+---------+----------+-----------+-----------+------+----------+
|- loop_wait_for_start | 0| 0| 1| 1| 1| 0| yes |
|- loop_height | 2079000| 2079000| 1925| -| -| 1080| no |
| + loop_width | 1920| 1920| 2| 1| 1| 1920| yes |
| + loop_wait_for_eol | 0| 0| 1| 1| 1| 0| yes |
+-----------------------+---------+---------+----------+-----------+-----------+------+----------+
============================================================
+ Verbose Summary: Synthesis Manager
============================================================
InlineROM: 1
ExposeGlobal: 0
============================================================
+ Verbose Summary: CDFG Model
============================================================
IsTopModel: 0
ResetActiveHigh: 1
IsCombinational: 2
IsDatapathOnly: 0
HasWiredReturn: 1
HasMFsm: 0
HasVarLatency: 1
IsPipeline: 0
IsRtlPipelined: 0
IsInstanceOverlapped: 0
IsDontTouch: 0
HasImplIP: 0
IsGatedGlobalClock: 0
+ Individual pipeline summary:
* Pipeline-0: initiation interval (II) = 1, depth = 1
* Pipeline-1: initiation interval (II) = 1, depth = 2
* Pipeline-2: initiation interval (II) = 1, depth = 1
============================================================
+ Verbose Summary: Schedule
============================================================
* Number of FSM states : 9
* Pipeline : 3
Pipeline-0 : II = 1, D = 1, States = { 2 }
Pipeline-1 : II = 1, D = 2, States = { 5 6 }
Pipeline-2 : II = 1, D = 1, States = { 8 }
* Dataflow Pipeline: 0
* FSM state transitions:
1 --> 2
2 --> 3 2
3 --> 4
4 --> 5
5 --> 7 6
6 --> 5
7 --> 8
8 --> 9 8
9 --> 4
* FSM state operations:
State 1 <SV = 0> <Delay = 0.00>
ST_1 : Operation 10 [1/1] (0.00ns) ---> "call void (...)* @_ssdm_op_SpecInterface(i8* %img_data_stream_2_V, [8 x i8]* @ap_fifo_str, i32 0, i32 0, [1 x i8]* @p_str, i32 0, i32 0, [1 x i8]* @p_str, [1 x i8]* @p_str, [1 x i8]* @p_str, i32 2, i32 2, i32 16, i32 16, [1 x i8]* @p_str, [1 x i8]* @p_str)" ---> Operation 10 'specinterface' <Predicate = true> <Delay = 0.00>
ST_1 : Operation 11 [1/1] (0.00ns) ---> "call void (...)* @_ssdm_op_SpecInterface(i8* %img_data_stream_1_V, [8 x i8]* @ap_fifo_str, i32 0, i32 0, [1 x i8]* @p_str, i32 0, i32 0, [1 x i8]* @p_str, [1 x i8]* @p_str, [1 x i8]* @p_str, i32 2, i32 2, i32 16, i32 16, [1 x i8]* @p_str, [1 x i8]* @p_str)" ---> Operation 11 'specinterface' <Predicate = true> <Delay = 0.00>
ST_1 : Operation 12 [1/1] (0.00ns) ---> "call void (...)* @_ssdm_op_SpecInterface(i8* %img_data_stream_0_V, [8 x i8]* @ap_fifo_str, i32 0, i32 0, [1 x i8]* @p_str, i32 0, i32 0, [1 x i8]* @p_str, [1 x i8]* @p_str, [1 x i8]* @p_str, i32 2, i32 2, i32 16, i32 16, [1 x i8]* @p_str, [1 x i8]* @p_str)" ---> Operation 12 'specinterface' <Predicate = true> <Delay = 0.00>
ST_1 : Operation 13 [1/1] (0.00ns) ---> "call void (...)* @_ssdm_op_SpecInterface(i24* %AXI_video_strm_V_data_V, i3* %AXI_video_strm_V_keep_V, i3* %AXI_video_strm_V_strb_V, i1* %AXI_video_strm_V_user_V, i1* %AXI_video_strm_V_last_V, i1* %AXI_video_strm_V_id_V, i1* %AXI_video_strm_V_dest_V, [5 x i8]* @p_str1, i32 1, i32 1, [5 x i8]* @p_str2, i32 0, i32 0, [1 x i8]* @p_str, [1 x i8]* @p_str, [1 x i8]* @p_str, i32 0, i32 0, i32 0, i32 0, [1 x i8]* @p_str, [1 x i8]* @p_str) nounwind" ---> Operation 13 'specinterface' <Predicate = true> <Delay = 0.00>
ST_1 : Operation 14 [1/1] (0.00ns) ---> "br label %loop_wait_for_start" [C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_io.h:63] ---> Operation 14 'br' <Predicate = true> <Delay = 0.00>
State 2 <SV = 1> <Delay = 0.00>
ST_2 : Operation 15 [1/1] (0.00ns) ---> "call void (...)* @_ssdm_op_SpecLoopName([20 x i8]* @p_str18) nounwind" [C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_io.h:65] ---> Operation 15 'specloopname' <Predicate = true> <Delay = 0.00>
ST_2 : Operation 16 [1/1] (0.00ns) ---> "%tmp_s = call i32 (...)* @_ssdm_op_SpecRegionBegin([20 x i8]* @p_str18)" [C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_io.h:65] ---> Operation 16 'specregionbegin' 'tmp_s' <Predicate = true> <Delay = 0.00>
ST_2 : Operation 17 [1/1] (0.00ns) ---> "call void (...)* @_ssdm_op_SpecPipeline(i32 1, i32 1, i32 1, i32 0, [1 x i8]* @p_str) nounwind" [C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_io.h:66] ---> Operation 17 'specpipeline' <Predicate = true> <Delay = 0.00>
ST_2 : Operation 18 [1/1] (0.00ns) ---> "call void (...)* @_ssdm_op_SpecLoopTripCount(i32 0, i32 0, i32 0, [1 x i8]* @p_str) nounwind" [C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_io.h:67] ---> Operation 18 'speclooptripcount' <Predicate = true> <Delay = 0.00>
ST_2 : Operation 19 [1/1] (0.00ns) ---> "%empty = call { i24, i3, i3, i1, i1, i1, i1 } @_ssdm_op_Read.axis.volatile.i24P.i3P.i3P.i1P.i1P.i1P.i1P(i24* %AXI_video_strm_V_data_V, i3* %AXI_video_strm_V_keep_V, i3* %AXI_video_strm_V_strb_V, i1* %AXI_video_strm_V_user_V, i1* %AXI_video_strm_V_last_V, i1* %AXI_video_strm_V_id_V, i1* %AXI_video_strm_V_dest_V)" [C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_io.h:68] ---> Operation 19 'read' 'empty' <Predicate = true> <Delay = 0.00> <Core = "AXI4Stream"> ---> Core 5 'AXI4Stream' <Latency = 0> <II = 1> <Delay = 1.00> <Adapter> <Opcode : >
ST_2 : Operation 20 [1/1] (0.00ns) ---> "%tmp_data_V = extractvalue { i24, i3, i3, i1, i1, i1, i1 } %empty, 0" [C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_io.h:68] ---> Operation 20 'extractvalue' 'tmp_data_V' <Predicate = true> <Delay = 0.00>
ST_2 : Operation 21 [1/1] (0.00ns) ---> "%tmp_user_V = extractvalue { i24, i3, i3, i1, i1, i1, i1 } %empty, 3" [C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_io.h:68] ---> Operation 21 'extractvalue' 'tmp_user_V' <Predicate = true> <Delay = 0.00>
ST_2 : Operation 22 [1/1] (0.00ns) ---> "%tmp_last_V = extractvalue { i24, i3, i3, i1, i1, i1, i1 } %empty, 4" [C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_io.h:68] ---> Operation 22 'extractvalue' 'tmp_last_V' <Predicate = true> <Delay = 0.00>
ST_2 : Operation 23 [1/1] (0.00ns) ---> "%empty_108 = call i32 (...)* @_ssdm_op_SpecRegionEnd([20 x i8]* @p_str18, i32 %tmp_s)" [C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_io.h:70] ---> Operation 23 'specregionend' 'empty_108' <Predicate = true> <Delay = 0.00>
ST_2 : Operation 24 [1/1] (0.00ns) ---> "br i1 %tmp_user_V, label %.preheader232.preheader, label %loop_wait_for_start" [C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_io.h:65] ---> Operation 24 'br' <Predicate = true> <Delay = 0.00>
State 3 <SV = 2> <Delay = 1.76>
ST_3 : Operation 25 [1/1] (0.00ns) ---> "%sof_1 = alloca i1" ---> Operation 25 'alloca' 'sof_1' <Predicate = true> <Delay = 0.00>
ST_3 : Operation 26 [1/1] (1.76ns) ---> "store i1 true, i1* %sof_1" [C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_io.h:71] ---> Operation 26 'store' <Predicate = true> <Delay = 1.76>
ST_3 : Operation 27 [1/1] (1.76ns) ---> "br label %.preheader232" [C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_io.h:71] ---> Operation 27 'br' <Predicate = true> <Delay = 1.76>
State 4 <SV = 3> <Delay = 2.85>
ST_4 : Operation 28 [1/1] (0.00ns) ---> "%axi_last_V_0 = phi i1 [ %axi_last_V_3, %loop_height_end ], [ %tmp_last_V, %.preheader232.preheader ]" ---> Operation 28 'phi' 'axi_last_V_0' <Predicate = true> <Delay = 0.00>
ST_4 : Operation 29 [1/1] (0.00ns) ---> "%axi_data_V_0 = phi i24 [ %axi_data_V_3, %loop_height_end ], [ %tmp_data_V, %.preheader232.preheader ]" ---> Operation 29 'phi' 'axi_data_V_0' <Predicate = true> <Delay = 0.00>
ST_4 : Operation 30 [1/1] (0.00ns) ---> "%t_V = phi i11 [ %i_V, %loop_height_end ], [ 0, %.preheader232.preheader ]" ---> Operation 30 'phi' 't_V' <Predicate = true> <Delay = 0.00>
ST_4 : Operation 31 [1/1] (1.88ns) ---> "%icmp_ln71 = icmp eq i11 %t_V, -968" [C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_io.h:71] ---> Operation 31 'icmp' 'icmp_ln71' <Predicate = true> <Delay = 1.88> <Core = "Cmp"> ---> Core 25 'Cmp' <Latency = 0> <II = 1> <Delay = 1.88> <FuncUnit> <Opcode : 'icmp'> <InPorts = 2> <OutPorts = 1>
ST_4 : Operation 32 [1/1] (1.63ns) ---> "%i_V = add i11 %t_V, 1" [C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_io.h:71] ---> Operation 32 'add' 'i_V' <Predicate = true> <Delay = 1.63> <Core = "AddSub"> ---> Core 14 'AddSub' <Latency = 0> <II = 1> <Delay = 1.63> <FuncUnit> <Opcode : 'add' 'sub'> <InPorts = 2> <OutPorts = 1>
ST_4 : Operation 33 [1/1] (0.00ns) ---> "call void (...)* @_ssdm_op_SpecLoopTripCount(i64 1080, i64 1080, i64 1080)" ---> Operation 33 'speclooptripcount' <Predicate = true> <Delay = 0.00>
ST_4 : Operation 34 [1/1] (0.00ns) ---> "br i1 %icmp_ln71, label %2, label %loop_height_begin" [C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_io.h:71] ---> Operation 34 'br' <Predicate = true> <Delay = 0.00>
ST_4 : Operation 35 [1/1] (0.00ns) ---> "call void (...)* @_ssdm_op_SpecLoopName([12 x i8]* @p_str7) nounwind" [C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_io.h:71] ---> Operation 35 'specloopname' <Predicate = (!icmp_ln71)> <Delay = 0.00>
ST_4 : Operation 36 [1/1] (0.00ns) ---> "%tmp_25 = call i32 (...)* @_ssdm_op_SpecRegionBegin([12 x i8]* @p_str7)" [C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_io.h:71] ---> Operation 36 'specregionbegin' 'tmp_25' <Predicate = (!icmp_ln71)> <Delay = 0.00>
ST_4 : Operation 37 [1/1] (1.76ns) ---> "br label %0" [C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_io.h:73] ---> Operation 37 'br' <Predicate = (!icmp_ln71)> <Delay = 1.76>
ST_4 : Operation 38 [1/1] (0.00ns) ---> "ret void" ---> Operation 38 'ret' <Predicate = (icmp_ln71)> <Delay = 0.00>
State 5 <SV = 4> <Delay = 2.85>
ST_5 : Operation 39 [1/1] (0.00ns) ---> "%eol = phi i1 [ %axi_last_V_0, %loop_height_begin ], [ %axi_last_V_2, %hls_label_4 ]" [C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_io.h:100] ---> Operation 39 'phi' 'eol' <Predicate = true> <Delay = 0.00>
ST_5 : Operation 40 [1/1] (0.00ns) ---> "%axi_data_V_1 = phi i24 [ %axi_data_V_0, %loop_height_begin ], [ %p_Val2_s, %hls_label_4 ]" ---> Operation 40 'phi' 'axi_data_V_1' <Predicate = true> <Delay = 0.00>
ST_5 : Operation 41 [1/1] (0.00ns) ---> "%t_V_5 = phi i11 [ 0, %loop_height_begin ], [ %j_V, %hls_label_4 ]" ---> Operation 41 'phi' 't_V_5' <Predicate = true> <Delay = 0.00>
ST_5 : Operation 42 [1/1] (0.00ns) ---> "%eol_0 = phi i1 [ false, %loop_height_begin ], [ %axi_last_V_2, %hls_label_4 ]" [C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_io.h:81] ---> Operation 42 'phi' 'eol_0' <Predicate = true> <Delay = 0.00>
ST_5 : Operation 43 [1/1] (1.88ns) ---> "%icmp_ln73 = icmp eq i11 %t_V_5, -128" [C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_io.h:73] ---> Operation 43 'icmp' 'icmp_ln73' <Predicate = true> <Delay = 1.88> <Core = "Cmp"> ---> Core 25 'Cmp' <Latency = 0> <II = 1> <Delay = 1.88> <FuncUnit> <Opcode : 'icmp'> <InPorts = 2> <OutPorts = 1>
ST_5 : Operation 44 [1/1] (1.63ns) ---> "%j_V = add i11 %t_V_5, 1" [C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_io.h:73] ---> Operation 44 'add' 'j_V' <Predicate = true> <Delay = 1.63> <Core = "AddSub"> ---> Core 14 'AddSub' <Latency = 0> <II = 1> <Delay = 1.63> <FuncUnit> <Opcode : 'add' 'sub'> <InPorts = 2> <OutPorts = 1>
ST_5 : Operation 45 [1/1] (0.00ns) ---> "call void (...)* @_ssdm_op_SpecLoopTripCount(i64 1920, i64 1920, i64 1920)" ---> Operation 45 'speclooptripcount' <Predicate = true> <Delay = 0.00>
ST_5 : Operation 46 [1/1] (0.00ns) ---> "br i1 %icmp_ln73, label %.preheader.preheader, label %loop_width_begin" [C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_io.h:73] ---> Operation 46 'br' <Predicate = true> <Delay = 0.00>
ST_5 : Operation 47 [1/1] (0.00ns) ---> "%sof_1_load = load i1* %sof_1" [C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_io.h:76] ---> Operation 47 'load' 'sof_1_load' <Predicate = (!icmp_ln73)> <Delay = 0.00>
ST_5 : Operation 48 [1/1] (0.97ns) ---> "%or_ln76 = or i1 %sof_1_load, %eol_0" [C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_io.h:76] ---> Operation 48 'or' 'or_ln76' <Predicate = (!icmp_ln73)> <Delay = 0.97> <Core = "LogicGate"> ---> Core 27 'LogicGate' <Latency = 0> <II = 1> <Delay = 0.97> <FuncUnit> <Opcode : 'and' 'or' 'xor'> <InPorts = 2> <OutPorts = 1>
ST_5 : Operation 49 [1/1] (1.76ns) ---> "br i1 %or_ln76, label %hls_label_4, label %1" [C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_io.h:76] ---> Operation 49 'br' <Predicate = (!icmp_ln73)> <Delay = 1.76>
ST_5 : Operation 50 [1/1] (0.00ns) ---> "%empty_109 = call { i24, i3, i3, i1, i1, i1, i1 } @_ssdm_op_Read.axis.volatile.i24P.i3P.i3P.i1P.i1P.i1P.i1P(i24* %AXI_video_strm_V_data_V, i3* %AXI_video_strm_V_keep_V, i3* %AXI_video_strm_V_strb_V, i1* %AXI_video_strm_V_user_V, i1* %AXI_video_strm_V_last_V, i1* %AXI_video_strm_V_id_V, i1* %AXI_video_strm_V_dest_V)" [C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_io.h:81] ---> Operation 50 'read' 'empty_109' <Predicate = (!icmp_ln73 & !or_ln76)> <Delay = 0.00> <Core = "AXI4Stream"> ---> Core 5 'AXI4Stream' <Latency = 0> <II = 1> <Delay = 1.00> <Adapter> <Opcode : >
ST_5 : Operation 51 [1/1] (0.00ns) ---> "%tmp_data_V_1 = extractvalue { i24, i3, i3, i1, i1, i1, i1 } %empty_109, 0" [C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_io.h:81] ---> Operation 51 'extractvalue' 'tmp_data_V_1' <Predicate = (!icmp_ln73 & !or_ln76)> <Delay = 0.00>
ST_5 : Operation 52 [1/1] (0.00ns) ---> "%tmp_last_V_1 = extractvalue { i24, i3, i3, i1, i1, i1, i1 } %empty_109, 4" [C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_io.h:81] ---> Operation 52 'extractvalue' 'tmp_last_V_1' <Predicate = (!icmp_ln73 & !or_ln76)> <Delay = 0.00>
ST_5 : Operation 53 [1/1] (1.76ns) ---> "br label %hls_label_4" ---> Operation 53 'br' <Predicate = (!icmp_ln73 & !or_ln76)> <Delay = 1.76>
ST_5 : Operation 54 [1/1] (0.00ns) ---> "%axi_last_V_2 = phi i1 [ %tmp_last_V_1, %1 ], [ %eol, %loop_width_begin ]" ---> Operation 54 'phi' 'axi_last_V_2' <Predicate = (!icmp_ln73)> <Delay = 0.00>
ST_5 : Operation 55 [1/1] (0.00ns) ---> "%p_Val2_s = phi i24 [ %tmp_data_V_1, %1 ], [ %axi_data_V_1, %loop_width_begin ]" ---> Operation 55 'phi' 'p_Val2_s' <Predicate = (!icmp_ln73)> <Delay = 0.00>
ST_5 : Operation 56 [1/1] (0.00ns) ---> "%tmp = trunc i24 %p_Val2_s to i8" [C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_axi_io.h:49->C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_axi_io.h:71->C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_io.h:92] ---> Operation 56 'trunc' 'tmp' <Predicate = (!icmp_ln73)> <Delay = 0.00>
ST_5 : Operation 57 [1/1] (0.00ns) ---> "%tmp_28 = call i8 @_ssdm_op_PartSelect.i8.i24.i32.i32(i24 %p_Val2_s, i32 8, i32 15)" [C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_axi_io.h:49->C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_axi_io.h:71->C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_io.h:92] ---> Operation 57 'partselect' 'tmp_28' <Predicate = (!icmp_ln73)> <Delay = 0.00>
ST_5 : Operation 58 [1/1] (0.00ns) ---> "%tmp_29 = call i8 @_ssdm_op_PartSelect.i8.i24.i32.i32(i24 %p_Val2_s, i32 16, i32 23)" [C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_axi_io.h:49->C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_axi_io.h:71->C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_io.h:92] ---> Operation 58 'partselect' 'tmp_29' <Predicate = (!icmp_ln73)> <Delay = 0.00>
ST_5 : Operation 59 [1/1] (1.76ns) ---> "store i1 false, i1* %sof_1" [C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_io.h:73] ---> Operation 59 'store' <Predicate = (!icmp_ln73)> <Delay = 1.76>
State 6 <SV = 5> <Delay = 2.93>
ST_6 : Operation 60 [1/1] (0.00ns) ---> "call void (...)* @_ssdm_op_SpecLoopName([11 x i8]* @p_str8) nounwind" [C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_io.h:73] ---> Operation 60 'specloopname' <Predicate = (!icmp_ln73)> <Delay = 0.00>
ST_6 : Operation 61 [1/1] (0.00ns) ---> "%tmp_26 = call i32 (...)* @_ssdm_op_SpecRegionBegin([11 x i8]* @p_str8)" [C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_io.h:73] ---> Operation 61 'specregionbegin' 'tmp_26' <Predicate = (!icmp_ln73)> <Delay = 0.00>
ST_6 : Operation 62 [1/1] (0.00ns) ---> "call void (...)* @_ssdm_op_SpecPipeline(i32 1, i32 1, i32 1, i32 0, [1 x i8]* @p_str) nounwind" [C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_io.h:75] ---> Operation 62 'specpipeline' <Predicate = (!icmp_ln73)> <Delay = 0.00>
ST_6 : Operation 63 [1/1] (0.00ns) ---> "%tmp_30 = call i32 (...)* @_ssdm_op_SpecRegionBegin([12 x i8]* @p_str16)" [C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_core.h:696->C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_core.h:717->C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_io.h:94] ---> Operation 63 'specregionbegin' 'tmp_30' <Predicate = (!icmp_ln73)> <Delay = 0.00>
ST_6 : Operation 64 [1/1] (0.00ns) ---> "call void (...)* @_ssdm_op_SpecProtocol(i32 0, [1 x i8]* @p_str) nounwind" [C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_core.h:700->C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_core.h:717->C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_io.h:94] ---> Operation 64 'specprotocol' <Predicate = (!icmp_ln73)> <Delay = 0.00>
ST_6 : Operation 65 [1/1] (2.93ns) ---> "call void @_ssdm_op_Write.ap_fifo.volatile.i8P(i8* %img_data_stream_0_V, i8 %tmp)" [C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_core.h:703->C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_core.h:717->C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_io.h:94] ---> Operation 65 'write' <Predicate = (!icmp_ln73)> <Delay = 2.93> <Core = "FIFO"> ---> Core 32 'FIFO' <Latency = 0> <II = 1> <Delay = 3.63> <Storage> <Opcode : 'read' 'write' 'nbread' 'nbwrite'> <Ports = 0> <Width = 8> <Depth = 2> <FIFO>
ST_6 : Operation 66 [1/1] (2.93ns) ---> "call void @_ssdm_op_Write.ap_fifo.volatile.i8P(i8* %img_data_stream_1_V, i8 %tmp_28)" [C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_core.h:703->C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_core.h:717->C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_io.h:94] ---> Operation 66 'write' <Predicate = (!icmp_ln73)> <Delay = 2.93> <Core = "FIFO"> ---> Core 32 'FIFO' <Latency = 0> <II = 1> <Delay = 3.63> <Storage> <Opcode : 'read' 'write' 'nbread' 'nbwrite'> <Ports = 0> <Width = 8> <Depth = 2> <FIFO>
ST_6 : Operation 67 [1/1] (2.93ns) ---> "call void @_ssdm_op_Write.ap_fifo.volatile.i8P(i8* %img_data_stream_2_V, i8 %tmp_29)" [C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_core.h:703->C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_core.h:717->C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_io.h:94] ---> Operation 67 'write' <Predicate = (!icmp_ln73)> <Delay = 2.93> <Core = "FIFO"> ---> Core 32 'FIFO' <Latency = 0> <II = 1> <Delay = 3.63> <Storage> <Opcode : 'read' 'write' 'nbread' 'nbwrite'> <Ports = 0> <Width = 8> <Depth = 2> <FIFO>
ST_6 : Operation 68 [1/1] (0.00ns) ---> "%empty_110 = call i32 (...)* @_ssdm_op_SpecRegionEnd([12 x i8]* @p_str16, i32 %tmp_30)" [C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_core.h:705->C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_core.h:717->C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_io.h:94] ---> Operation 68 'specregionend' 'empty_110' <Predicate = (!icmp_ln73)> <Delay = 0.00>
ST_6 : Operation 69 [1/1] (0.00ns) ---> "%empty_111 = call i32 (...)* @_ssdm_op_SpecRegionEnd([11 x i8]* @p_str8, i32 %tmp_26)" [C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_io.h:95] ---> Operation 69 'specregionend' 'empty_111' <Predicate = (!icmp_ln73)> <Delay = 0.00>
ST_6 : Operation 70 [1/1] (0.00ns) ---> "br label %0" [C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_io.h:73] ---> Operation 70 'br' <Predicate = (!icmp_ln73)> <Delay = 0.00>
State 7 <SV = 5> <Delay = 1.76>
ST_7 : Operation 71 [1/1] (1.76ns) ---> "br label %.preheader" [C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_io.h:96] ---> Operation 71 'br' <Predicate = true> <Delay = 1.76>
State 8 <SV = 6> <Delay = 0.00>
ST_8 : Operation 72 [1/1] (0.00ns) ---> "%axi_last_V_3 = phi i1 [ %tmp_last_V_2, %loop_wait_for_eol ], [ %eol, %.preheader.preheader ]" ---> Operation 72 'phi' 'axi_last_V_3' <Predicate = true> <Delay = 0.00>
ST_8 : Operation 73 [1/1] (0.00ns) ---> "%axi_data_V_3 = phi i24 [ %tmp_data_V_2, %loop_wait_for_eol ], [ %axi_data_V_1, %.preheader.preheader ]" ---> Operation 73 'phi' 'axi_data_V_3' <Predicate = true> <Delay = 0.00>
ST_8 : Operation 74 [1/1] (0.00ns) ---> "%eol_2 = phi i1 [ %tmp_last_V_2, %loop_wait_for_eol ], [ %eol_0, %.preheader.preheader ]" ---> Operation 74 'phi' 'eol_2' <Predicate = true> <Delay = 0.00>
ST_8 : Operation 75 [1/1] (0.00ns) ---> "br i1 %eol_2, label %loop_height_end, label %loop_wait_for_eol" [C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_io.h:96] ---> Operation 75 'br' <Predicate = true> <Delay = 0.00>
ST_8 : Operation 76 [1/1] (0.00ns) ---> "call void (...)* @_ssdm_op_SpecLoopName([18 x i8]* @p_str19) nounwind" [C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_io.h:96] ---> Operation 76 'specloopname' <Predicate = (!eol_2)> <Delay = 0.00>
ST_8 : Operation 77 [1/1] (0.00ns) ---> "%tmp_27 = call i32 (...)* @_ssdm_op_SpecRegionBegin([18 x i8]* @p_str19)" [C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_io.h:96] ---> Operation 77 'specregionbegin' 'tmp_27' <Predicate = (!eol_2)> <Delay = 0.00>
ST_8 : Operation 78 [1/1] (0.00ns) ---> "call void (...)* @_ssdm_op_SpecPipeline(i32 1, i32 1, i32 1, i32 0, [1 x i8]* @p_str) nounwind" [C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_io.h:97] ---> Operation 78 'specpipeline' <Predicate = (!eol_2)> <Delay = 0.00>
ST_8 : Operation 79 [1/1] (0.00ns) ---> "call void (...)* @_ssdm_op_SpecLoopTripCount(i32 0, i32 0, i32 0, [1 x i8]* @p_str) nounwind" [C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_io.h:98] ---> Operation 79 'speclooptripcount' <Predicate = (!eol_2)> <Delay = 0.00>
ST_8 : Operation 80 [1/1] (0.00ns) ---> "%empty_112 = call { i24, i3, i3, i1, i1, i1, i1 } @_ssdm_op_Read.axis.volatile.i24P.i3P.i3P.i1P.i1P.i1P.i1P(i24* %AXI_video_strm_V_data_V, i3* %AXI_video_strm_V_keep_V, i3* %AXI_video_strm_V_strb_V, i1* %AXI_video_strm_V_user_V, i1* %AXI_video_strm_V_last_V, i1* %AXI_video_strm_V_id_V, i1* %AXI_video_strm_V_dest_V)" [C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_io.h:100] ---> Operation 80 'read' 'empty_112' <Predicate = (!eol_2)> <Delay = 0.00> <Core = "AXI4Stream"> ---> Core 5 'AXI4Stream' <Latency = 0> <II = 1> <Delay = 1.00> <Adapter> <Opcode : >
ST_8 : Operation 81 [1/1] (0.00ns) ---> "%tmp_data_V_2 = extractvalue { i24, i3, i3, i1, i1, i1, i1 } %empty_112, 0" [C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_io.h:100] ---> Operation 81 'extractvalue' 'tmp_data_V_2' <Predicate = (!eol_2)> <Delay = 0.00>
ST_8 : Operation 82 [1/1] (0.00ns) ---> "%tmp_last_V_2 = extractvalue { i24, i3, i3, i1, i1, i1, i1 } %empty_112, 4" [C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_io.h:100] ---> Operation 82 'extractvalue' 'tmp_last_V_2' <Predicate = (!eol_2)> <Delay = 0.00>
ST_8 : Operation 83 [1/1] (0.00ns) ---> "%empty_113 = call i32 (...)* @_ssdm_op_SpecRegionEnd([18 x i8]* @p_str19, i32 %tmp_27)" [C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_io.h:103] ---> Operation 83 'specregionend' 'empty_113' <Predicate = (!eol_2)> <Delay = 0.00>
ST_8 : Operation 84 [1/1] (0.00ns) ---> "br label %.preheader" [C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_io.h:103] ---> Operation 84 'br' <Predicate = (!eol_2)> <Delay = 0.00>
State 9 <SV = 7> <Delay = 0.00>
ST_9 : Operation 85 [1/1] (0.00ns) ---> "%empty_114 = call i32 (...)* @_ssdm_op_SpecRegionEnd([12 x i8]* @p_str7, i32 %tmp_25)" [C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_io.h:104] ---> Operation 85 'specregionend' 'empty_114' <Predicate = true> <Delay = 0.00>
ST_9 : Operation 86 [1/1] (0.00ns) ---> "br label %.preheader232" [C:/Xilinx/Vivado/2019.1/common/technology/autopilot/hls/hls_video_io.h:71] ---> Operation 86 'br' <Predicate = true> <Delay = 0.00>
============================================================
+ Verbose Summary: Binding
============================================================
STG Binding:
---------------- STG Properties BEGIN ----------------
- Is combinational: 0
- Is one-state seq: 0
- Is datapath-only: 0
- Is pipelined: 0
- Is top level: 0
Port [ Return ] is wired: 1; IO mode=ap_ctrl_hs:ce=0
Port [ AXI_video_strm_V_data_V]: wired=1; compound=1; hidden=0; nouse=0; global=0; static=0; extern=0; dir=0; type=0; pingpong=0; private_global=0; IO mode=axis:ce=0
Port [ AXI_video_strm_V_keep_V]: wired=1; compound=1; hidden=0; nouse=0; global=0; static=0; extern=0; dir=0; type=0; pingpong=0; private_global=0; IO mode=axis:ce=0
Port [ AXI_video_strm_V_strb_V]: wired=1; compound=1; hidden=0; nouse=0; global=0; static=0; extern=0; dir=0; type=0; pingpong=0; private_global=0; IO mode=axis:ce=0
Port [ AXI_video_strm_V_user_V]: wired=1; compound=1; hidden=0; nouse=0; global=0; static=0; extern=0; dir=0; type=0; pingpong=0; private_global=0; IO mode=axis:ce=0
Port [ AXI_video_strm_V_last_V]: wired=1; compound=1; hidden=0; nouse=0; global=0; static=0; extern=0; dir=0; type=0; pingpong=0; private_global=0; IO mode=axis:ce=0
Port [ AXI_video_strm_V_id_V]: wired=1; compound=1; hidden=0; nouse=0; global=0; static=0; extern=0; dir=0; type=0; pingpong=0; private_global=0; IO mode=axis:ce=0
Port [ AXI_video_strm_V_dest_V]: wired=1; compound=1; hidden=0; nouse=0; global=0; static=0; extern=0; dir=0; type=0; pingpong=0; private_global=0; IO mode=axis:ce=0
Port [ img_data_stream_0_V]: wired=1; compound=1; hidden=0; nouse=0; global=0; static=0; extern=0; dir=1; type=3; pingpong=0; private_global=0; IO mode=ap_fifo:ce=0
Port [ img_data_stream_1_V]: wired=1; compound=1; hidden=0; nouse=0; global=0; static=0; extern=0; dir=1; type=3; pingpong=0; private_global=0; IO mode=ap_fifo:ce=0
Port [ img_data_stream_2_V]: wired=1; compound=1; hidden=0; nouse=0; global=0; static=0; extern=0; dir=1; type=3; pingpong=0; private_global=0; IO mode=ap_fifo:ce=0
---------------- STG Properties END ------------------
---------------- Datapath Model BEGIN ----------------
<LifeTime>
<method=bitvector/>
specinterface_ln0 (specinterface ) [ 0000000000]
specinterface_ln0 (specinterface ) [ 0000000000]
specinterface_ln0 (specinterface ) [ 0000000000]
specinterface_ln0 (specinterface ) [ 0000000000]
br_ln63 (br ) [ 0000000000]
specloopname_ln65 (specloopname ) [ 0000000000]
tmp_s (specregionbegin ) [ 0000000000]
specpipeline_ln66 (specpipeline ) [ 0000000000]
speclooptripcount_ln67 (speclooptripcount) [ 0000000000]
empty (read ) [ 0000000000]
tmp_data_V (extractvalue ) [ 0001111111]
tmp_user_V (extractvalue ) [ 0010000000]
tmp_last_V (extractvalue ) [ 0001111111]
empty_108 (specregionend ) [ 0000000000]
br_ln65 (br ) [ 0000000000]
sof_1 (alloca ) [ 0001111111]
store_ln71 (store ) [ 0000000000]
br_ln71 (br ) [ 0001111111]
axi_last_V_0 (phi ) [ 0000111000]
axi_data_V_0 (phi ) [ 0000111000]
t_V (phi ) [ 0000100000]
icmp_ln71 (icmp ) [ 0000111111]
i_V (add ) [ 0001111111]
speclooptripcount_ln0 (speclooptripcount) [ 0000000000]
br_ln71 (br ) [ 0000000000]
specloopname_ln71 (specloopname ) [ 0000000000]
tmp_25 (specregionbegin ) [ 0000011111]
br_ln73 (br ) [ 0000111111]
ret_ln0 (ret ) [ 0000000000]
eol (phi ) [ 0000010110]
axi_data_V_1 (phi ) [ 0000010110]
t_V_5 (phi ) [ 0000010000]
eol_0 (phi ) [ 0000010110]
icmp_ln73 (icmp ) [ 0000111111]
j_V (add ) [ 0000111111]
speclooptripcount_ln0 (speclooptripcount) [ 0000000000]
br_ln73 (br ) [ 0000000000]
sof_1_load (load ) [ 0000000000]
or_ln76 (or ) [ 0000111111]
br_ln76 (br ) [ 0000000000]
empty_109 (read ) [ 0000000000]
tmp_data_V_1 (extractvalue ) [ 0000000000]
tmp_last_V_1 (extractvalue ) [ 0000000000]
br_ln0 (br ) [ 0000000000]
axi_last_V_2 (phi ) [ 0000111111]
p_Val2_s (phi ) [ 0000111111]
tmp (trunc ) [ 0000011000]
tmp_28 (partselect ) [ 0000011000]
tmp_29 (partselect ) [ 0000011000]
store_ln73 (store ) [ 0000000000]
specloopname_ln73 (specloopname ) [ 0000000000]
tmp_26 (specregionbegin ) [ 0000000000]
specpipeline_ln75 (specpipeline ) [ 0000000000]
tmp_30 (specregionbegin ) [ 0000000000]
specprotocol_ln700 (specprotocol ) [ 0000000000]
write_ln703 (write ) [ 0000000000]
write_ln703 (write ) [ 0000000000]
write_ln703 (write ) [ 0000000000]
empty_110 (specregionend ) [ 0000000000]
empty_111 (specregionend ) [ 0000000000]
br_ln73 (br ) [ 0000111111]
br_ln96 (br ) [ 0000111111]
axi_last_V_3 (phi ) [ 0001100011]
axi_data_V_3 (phi ) [ 0001100011]
eol_2 (phi ) [ 0000000010]
br_ln96 (br ) [ 0000000000]
specloopname_ln96 (specloopname ) [ 0000000000]
tmp_27 (specregionbegin ) [ 0000000000]
specpipeline_ln97 (specpipeline ) [ 0000000000]
speclooptripcount_ln98 (speclooptripcount) [ 0000000000]
empty_112 (read ) [ 0000000000]
tmp_data_V_2 (extractvalue ) [ 0000111111]
tmp_last_V_2 (extractvalue ) [ 0000111111]
empty_113 (specregionend ) [ 0000000000]
br_ln103 (br ) [ 0000111111]
empty_114 (specregionend ) [ 0000000000]
br_ln71 (br ) [ 0001111111]
</LifeTime>
<model>
<comp_list>
<comp id="0" class="1000" name="AXI_video_strm_V_data_V">
<pin_list>
<pin id="1" dir="1" index="0" bw="1" slack="0"/>
</pin_list>
<bind>
<StgValue><ssdm name="AXI_video_strm_V_data_V"/></StgValue>
</bind>
</comp>
<comp id="2" class="1000" name="AXI_video_strm_V_keep_V">
<pin_list>
<pin id="3" dir="1" index="0" bw="1" slack="0"/>
</pin_list>
<bind>
<StgValue><ssdm name="AXI_video_strm_V_keep_V"/></StgValue>
</bind>
</comp>
<comp id="4" class="1000" name="AXI_video_strm_V_strb_V">
<pin_list>
<pin id="5" dir="1" index="0" bw="1" slack="0"/>
</pin_list>
<bind>
<StgValue><ssdm name="AXI_video_strm_V_strb_V"/></StgValue>
</bind>
</comp>
<comp id="6" class="1000" name="AXI_video_strm_V_user_V">
<pin_list>
<pin id="7" dir="1" index="0" bw="1" slack="0"/>
</pin_list>
<bind>
<StgValue><ssdm name="AXI_video_strm_V_user_V"/></StgValue>
</bind>
</comp>
<comp id="8" class="1000" name="AXI_video_strm_V_last_V">
<pin_list>
<pin id="9" dir="1" index="0" bw="1" slack="0"/>
</pin_list>
<bind>
<StgValue><ssdm name="AXI_video_strm_V_last_V"/></StgValue>
</bind>
</comp>
<comp id="10" class="1000" name="AXI_video_strm_V_id_V">
<pin_list>
<pin id="11" dir="1" index="0" bw="1" slack="0"/>
</pin_list>
<bind>
<StgValue><ssdm name="AXI_video_strm_V_id_V"/></StgValue>
</bind>
</comp>
<comp id="12" class="1000" name="AXI_video_strm_V_dest_V">
<pin_list>
<pin id="13" dir="1" index="0" bw="1" slack="0"/>
</pin_list>
<bind>
<StgValue><ssdm name="AXI_video_strm_V_dest_V"/></StgValue>
</bind>
</comp>
<comp id="14" class="1000" name="img_data_stream_0_V">
<pin_list>
<pin id="15" dir="1" index="0" bw="1" slack="0"/>
</pin_list>
<bind>
<StgValue><ssdm name="img_data_stream_0_V"/></StgValue>
</bind>
</comp>
<comp id="16" class="1000" name="img_data_stream_1_V">
<pin_list>
<pin id="17" dir="1" index="0" bw="1" slack="0"/>
</pin_list>
<bind>
<StgValue><ssdm name="img_data_stream_1_V"/></StgValue>
</bind>
</comp>
<comp id="18" class="1000" name="img_data_stream_2_V">
<pin_list>
<pin id="19" dir="1" index="0" bw="1" slack="0"/>
</pin_list>
<bind>
<StgValue><ssdm name="img_data_stream_2_V"/></StgValue>
</bind>
</comp>
<comp id="20" class="1001" name="const_20">
<pin_list>
<pin id="21" dir="1" index="0" bw="1" slack="2147483647"/>
</pin_list>
<bind>
<StgValue><ssdm name="_ssdm_op_SpecInterface"/></StgValue>
</bind>
</comp>
<comp id="22" class="1001" name="const_22">
<pin_list>
<pin id="23" dir="1" index="0" bw="1" slack="2147483647"/>
</pin_list>
<bind>
<StgValue><ssdm name="ap_fifo_str"/></StgValue>
</bind>
</comp>
<comp id="24" class="1001" name="const_24">
<pin_list>
<pin id="25" dir="1" index="0" bw="1" slack="2147483647"/>
</pin_list>
<bind>
<StgValue><ssdm name=""/></StgValue>
</bind>
</comp>
<comp id="26" class="1001" name="const_26">
<pin_list>
<pin id="27" dir="1" index="0" bw="1" slack="2147483647"/>
</pin_list>
<bind>
<StgValue><ssdm name="p_str"/></StgValue>
</bind>
</comp>
<comp id="28" class="1001" name="const_28">
<pin_list>
<pin id="29" dir="1" index="0" bw="1" slack="2147483647"/>
</pin_list>
<bind>
<StgValue><ssdm name=""/></StgValue>
</bind>
</comp>
<comp id="30" class="1001" name="const_30">
<pin_list>
<pin id="31" dir="1" index="0" bw="1" slack="0"/>
</pin_list>
<bind>
<StgValue><ssdm name=""/></StgValue>
</bind>
</comp>
<comp id="32" class="1001" name="const_32">
<pin_list>
<pin id="33" dir="1" index="0" bw="1" slack="2147483647"/>
</pin_list>
<bind>
<StgValue><ssdm name="p_str1"/></StgValue>
</bind>
</comp>
<comp id="34" class="1001" name="const_34">
<pin_list>
<pin id="35" dir="1" index="0" bw="1" slack="0"/>
</pin_list>
<bind>
<StgValue><ssdm name=""/></StgValue>
</bind>
</comp>
<comp id="36" class="1001" name="const_36">
<pin_list>
<pin id="37" dir="1" index="0" bw="1" slack="2147483647"/>
</pin_list>
<bind>
<StgValue><ssdm name="p_str2"/></StgValue>
</bind>
</comp>
<comp id="38" class="1001" name="const_38">
<pin_list>
<pin id="39" dir="1" index="0" bw="1" slack="2147483647"/>
</pin_list>
<bind>
<StgValue><ssdm name="_ssdm_op_SpecLoopName"/></StgValue>
</bind>
</comp>
<comp id="40" class="1001" name="const_40">
<pin_list>
<pin id="41" dir="1" index="0" bw="1" slack="2147483647"/>
</pin_list>
<bind>
<StgValue><ssdm name="p_str18"/></StgValue>
</bind>
</comp>
<comp id="42" class="1001" name="const_42">
<pin_list>
<pin id="43" dir="1" index="0" bw="1" slack="2147483647"/>
</pin_list>
<bind>
<StgValue><ssdm name="_ssdm_op_SpecRegionBegin"/></StgValue>
</bind>
</comp>
<comp id="44" class="1001" name="const_44">
<pin_list>
<pin id="45" dir="1" index="0" bw="1" slack="2147483647"/>
</pin_list>
<bind>
<StgValue><ssdm name="_ssdm_op_SpecPipeline"/></StgValue>
</bind>
</comp>
<comp id="46" class="1001" name="const_46">
<pin_list>
<pin id="47" dir="1" index="0" bw="1" slack="2147483647"/>
</pin_list>
<bind>
<StgValue><ssdm name="_ssdm_op_SpecLoopTripCount"/></StgValue>
</bind>
</comp>
<comp id="48" class="1001" name="const_48">
<pin_list>
<pin id="49" dir="1" index="0" bw="1" slack="0"/>
</pin_list>
<bind>
<StgValue><ssdm name="_ssdm_op_Read.axis.volatile.i24P.i3P.i3P.i1P.i1P.i1P.i1P"/></StgValue>
</bind>
</comp>
<comp id="50" class="1001" name="const_50">
<pin_list>
<pin id="51" dir="1" index="0" bw="1" slack="2147483647"/>
</pin_list>
<bind>
<StgValue><ssdm name="_ssdm_op_SpecRegionEnd"/></StgValue>
</bind>
</comp>
<comp id="52" class="1001" name="const_52">
<pin_list>
<pin id="53" dir="1" index="0" bw="1" slack="0"/>
</pin_list>
<bind>
<StgValue><ssdm name=""/></StgValue>
</bind>
</comp>
<comp id="54" class="1001" name="const_54">
<pin_list>
<pin id="55" dir="1" index="0" bw="1" slack="1"/>
</pin_list>
<bind>
<StgValue><ssdm name=""/></StgValue>
</bind>
</comp>
<comp id="56" class="1001" name="const_56">
<pin_list>
<pin id="57" dir="1" index="0" bw="1" slack="0"/>
</pin_list>
<bind>
<StgValue><ssdm name=""/></StgValue>
</bind>
</comp>
<comp id="58" class="1001" name="const_58">
<pin_list>
<pin id="59" dir="1" index="0" bw="1" slack="0"/>
</pin_list>
<bind>
<StgValue><ssdm name=""/></StgValue>
</bind>
</comp>
<comp id="60" class="1001" name="const_60">
<pin_list>
<pin id="61" dir="1" index="0" bw="1" slack="2147483647"/>
</pin_list>
<bind>
<StgValue><ssdm name=""/></StgValue>
</bind>
</comp>
<comp id="62" class="1001" name="const_62">
<pin_list>
<pin id="63" dir="1" index="0" bw="1" slack="2147483647"/>
</pin_list>
<bind>
<StgValue><ssdm name="p_str7"/></StgValue>
</bind>
</comp>
<comp id="64" class="1001" name="const_64">
<pin_list>
<pin id="65" dir="1" index="0" bw="1" slack="0"/>
</pin_list>
<bind>
<StgValue><ssdm name=""/></StgValue>
</bind>
</comp>
<comp id="66" class="1001" name="const_66">
<pin_list>
<pin id="67" dir="1" index="0" bw="1" slack="0"/>
</pin_list>
<bind>
<StgValue><ssdm name=""/></StgValue>
</bind>
</comp>
<comp id="68" class="1001" name="const_68">
<pin_list>
<pin id="69" dir="1" index="0" bw="1" slack="2147483647"/>
</pin_list>
<bind>
<StgValue><ssdm name=""/></StgValue>
</bind>
</comp>
<comp id="70" class="1001" name="const_70">
<pin_list>
<pin id="71" dir="1" index="0" bw="1" slack="0"/>
</pin_list>
<bind>
<StgValue><ssdm name="_ssdm_op_PartSelect.i8.i24.i32.i32"/></StgValue>
</bind>
</comp>
<comp id="72" class="1001" name="const_72">
<pin_list>
<pin id="73" dir="1" index="0" bw="1" slack="0"/>
</pin_list>
<bind>
<StgValue><ssdm name=""/></StgValue>
</bind>
</comp>
<comp id="74" class="1001" name="const_74">
<pin_list>
<pin id="75" dir="1" index="0" bw="1" slack="0"/>
</pin_list>
<bind>
<StgValue><ssdm name=""/></StgValue>
</bind>
</comp>
<comp id="76" class="1001" name="const_76">
<pin_list>
<pin id="77" dir="1" index="0" bw="1" slack="0"/>
</pin_list>
<bind>
<StgValue><ssdm name=""/></StgValue>
</bind>
</comp>
<comp id="78" class="1001" name="const_78">
<pin_list>
<pin id="79" dir="1" index="0" bw="1" slack="2147483647"/>
</pin_list>
<bind>
<StgValue><ssdm name="p_str8"/></StgValue>
</bind>
</comp>
<comp id="80" class="1001" name="const_80">
<pin_list>
<pin id="81" dir="1" index="0" bw="1" slack="2147483647"/>
</pin_list>
<bind>
<StgValue><ssdm name="p_str16"/></StgValue>
</bind>
</comp>
<comp id="82" class="1001" name="const_82">
<pin_list>
<pin id="83" dir="1" index="0" bw="1" slack="2147483647"/>
</pin_list>
<bind>
<StgValue><ssdm name="_ssdm_op_SpecProtocol"/></StgValue>
</bind>
</comp>
<comp id="84" class="1001" name="const_84">
<pin_list>
<pin id="85" dir="1" index="0" bw="1" slack="0"/>
</pin_list>
<bind>
<StgValue><ssdm name="_ssdm_op_Write.ap_fifo.volatile.i8P"/></StgValue>
</bind>
</comp>
<comp id="86" class="1001" name="const_86">
<pin_list>
<pin id="87" dir="1" index="0" bw="1" slack="2147483647"/>
</pin_list>
<bind>
<StgValue><ssdm name="p_str19"/></StgValue>
</bind>
</comp>
<comp id="88" class="1004" name="sof_1_fu_88">
<pin_list>
<pin id="89" dir="0" index="0" bw="1" slack="0"/>
<pin id="90" dir="1" index="1" bw="1" slack="0"/>
</pin_list>
<bind>
<opcode="alloca(26) " fcode="alloca"/>
<opset="sof_1/3 "/>
</bind>
</comp>
<comp id="92" class="1004" name="grp_read_fu_92">
<pin_list>
<pin id="93" dir="0" index="0" bw="34" slack="0"/>
<pin id="94" dir="0" index="1" bw="24" slack="0"/>
<pin id="95" dir="0" index="2" bw="3" slack="0"/>
<pin id="96" dir="0" index="3" bw="3" slack="0"/>
<pin id="97" dir="0" index="4" bw="1" slack="0"/>
<pin id="98" dir="0" index="5" bw="1" slack="0"/>
<pin id="99" dir="0" index="6" bw="1" slack="0"/>
<pin id="100" dir="0" index="7" bw="1" slack="0"/>
<pin id="101" dir="1" index="8" bw="34" slack="0"/>
</pin_list>
<bind>
<opcode="read(1150) " fcode="read"/>
<opset="empty/2 empty_109/5 empty_112/8 "/>
</bind>
</comp>
<comp id="110" class="1004" name="write_ln703_write_fu_110">
<pin_list>
<pin id="111" dir="0" index="0" bw="0" slack="0"/>
<pin id="112" dir="0" index="1" bw="8" slack="0"/>
<pin id="113" dir="0" index="2" bw="8" slack="1"/>
<pin id="114" dir="1" index="3" bw="0" slack="2147483647"/>
</pin_list>
<bind>
<opcode="write(1151) " fcode="write"/>
<opset="write_ln703/6 "/>
</bind>
</comp>
<comp id="117" class="1004" name="write_ln703_write_fu_117">
<pin_list>
<pin id="118" dir="0" index="0" bw="0" slack="0"/>
<pin id="119" dir="0" index="1" bw="8" slack="0"/>
<pin id="120" dir="0" index="2" bw="8" slack="1"/>
<pin id="121" dir="1" index="3" bw="0" slack="2147483647"/>
</pin_list>
<bind>
<opcode="write(1151) " fcode="write"/>
<opset="write_ln703/6 "/>
</bind>
</comp>
<comp id="124" class="1004" name="write_ln703_write_fu_124">
<pin_list>
<pin id="125" dir="0" index="0" bw="0" slack="0"/>
<pin id="126" dir="0" index="1" bw="8" slack="0"/>
<pin id="127" dir="0" index="2" bw="8" slack="1"/>
<pin id="128" dir="1" index="3" bw="0" slack="2147483647"/>
</pin_list>
<bind>
<opcode="write(1151) " fcode="write"/>
<opset="write_ln703/6 "/>
</bind>
</comp>
<comp id="131" class="1005" name="axi_last_V_0_reg_131">
<pin_list>
<pin id="132" dir="0" index="0" bw="1" slack="1"/>
<pin id="133" dir="1" index="1" bw="1" slack="1"/>
</pin_list>
<bind>
<opset="axi_last_V_0 (phireg) "/>
</bind>
</comp>
<comp id="134" class="1004" name="axi_last_V_0_phi_fu_134">
<pin_list>
<pin id="135" dir="0" index="0" bw="1" slack="1"/>
<pin id="136" dir="0" index="1" bw="0" slack="2147483647"/>
<pin id="137" dir="0" index="2" bw="1" slack="2"/>
<pin id="138" dir="0" index="3" bw="0" slack="2147483647"/>
<pin id="139" dir="1" index="4" bw="1" slack="1"/>
</pin_list>
<bind>
<opcode="phi(47) " fcode="phi"/>
<opset="axi_last_V_0/4 "/>
</bind>
</comp>
<comp id="141" class="1005" name="axi_data_V_0_reg_141">
<pin_list>
<pin id="142" dir="0" index="0" bw="24" slack="1"/>
<pin id="143" dir="1" index="1" bw="24" slack="1"/>
</pin_list>
<bind>
<opset="axi_data_V_0 (phireg) "/>
</bind>
</comp>
<comp id="144" class="1004" name="axi_data_V_0_phi_fu_144">
<pin_list>
<pin id="145" dir="0" index="0" bw="24" slack="1"/>
<pin id="146" dir="0" index="1" bw="0" slack="2147483647"/>
<pin id="147" dir="0" index="2" bw="24" slack="2"/>
<pin id="148" dir="0" index="3" bw="0" slack="2147483647"/>
<pin id="149" dir="1" index="4" bw="24" slack="1"/>
</pin_list>
<bind>
<opcode="phi(47) " fcode="phi"/>
<opset="axi_data_V_0/4 "/>
</bind>
</comp>
<comp id="151" class="1005" name="t_V_reg_151">
<pin_list>
<pin id="152" dir="0" index="0" bw="11" slack="1"/>
<pin id="153" dir="1" index="1" bw="11" slack="1"/>
</pin_list>
<bind>
<opset="t_V (phireg) "/>
</bind>
</comp>
<comp id="155" class="1004" name="t_V_phi_fu_155">
<pin_list>
<pin id="156" dir="0" index="0" bw="11" slack="0"/>
<pin id="157" dir="0" index="1" bw="0" slack="2147483647"/>
<pin id="158" dir="0" index="2" bw="1" slack="1"/>
<pin id="159" dir="0" index="3" bw="0" slack="2147483647"/>
<pin id="160" dir="1" index="4" bw="11" slack="0"/>
</pin_list>
<bind>
<opcode="phi(47) " fcode="phi"/>
<opset="t_V/4 "/>
</bind>
</comp>
<comp id="162" class="1005" name="eol_reg_162">
<pin_list>
<pin id="163" dir="0" index="0" bw="1" slack="2"/>
<pin id="164" dir="1" index="1" bw="1" slack="2"/>
</pin_list>
<bind>
<opset="eol (phireg) "/>
</bind>
</comp>
<comp id="165" class="1004" name="eol_phi_fu_165">
<pin_list>
<pin id="166" dir="0" index="0" bw="1" slack="1"/>
<pin id="167" dir="0" index="1" bw="0" slack="2147483647"/>
<pin id="168" dir="0" index="2" bw="1" slack="0"/>
<pin id="169" dir="0" index="3" bw="0" slack="2147483647"/>
<pin id="170" dir="1" index="4" bw="1" slack="0"/>
</pin_list>
<bind>
<opcode="phi(47) " fcode="phi"/>
<opset="eol/5 "/>
</bind>
</comp>
<comp id="173" class="1005" name="axi_data_V_1_reg_173">
<pin_list>
<pin id="174" dir="0" index="0" bw="24" slack="2"/>
<pin id="175" dir="1" index="1" bw="24" slack="2"/>
</pin_list>
<bind>
<opset="axi_data_V_1 (phireg) "/>
</bind>
</comp>
<comp id="176" class="1004" name="axi_data_V_1_phi_fu_176">
<pin_list>
<pin id="177" dir="0" index="0" bw="24" slack="1"/>
<pin id="178" dir="0" index="1" bw="0" slack="2147483647"/>
<pin id="179" dir="0" index="2" bw="24" slack="0"/>
<pin id="180" dir="0" index="3" bw="0" slack="2147483647"/>
<pin id="181" dir="1" index="4" bw="24" slack="0"/>
</pin_list>
<bind>
<opcode="phi(47) " fcode="phi"/>
<opset="axi_data_V_1/5 "/>
</bind>
</comp>
<comp id="184" class="1005" name="t_V_5_reg_184">
<pin_list>
<pin id="185" dir="0" index="0" bw="11" slack="1"/>
<pin id="186" dir="1" index="1" bw="11" slack="1"/>
</pin_list>
<bind>
<opset="t_V_5 (phireg) "/>
</bind>
</comp>
<comp id="188" class="1004" name="t_V_5_phi_fu_188">
<pin_list>
<pin id="189" dir="0" index="0" bw="1" slack="1"/>
<pin id="190" dir="0" index="1" bw="0" slack="2147483647"/>
<pin id="191" dir="0" index="2" bw="11" slack="0"/>
<pin id="192" dir="0" index="3" bw="0" slack="2147483647"/>
<pin id="193" dir="1" index="4" bw="11" slack="0"/>
</pin_list>
<bind>
<opcode="phi(47) " fcode="phi"/>
<opset="t_V_5/5 "/>
</bind>
</comp>
<comp id="195" class="1005" name="eol_0_reg_195">
<pin_list>
<pin id="196" dir="0" index="0" bw="1" slack="1"/>
<pin id="197" dir="1" index="1" bw="1" slack="1"/>
</pin_list>
<bind>
<opset="eol_0 (phireg) "/>
</bind>
</comp>
<comp id="199" class="1004" name="eol_0_phi_fu_199">
<pin_list>
<pin id="200" dir="0" index="0" bw="1" slack="1"/>
<pin id="201" dir="0" index="1" bw="0" slack="2147483647"/>
<pin id="202" dir="0" index="2" bw="1" slack="0"/>
<pin id="203" dir="0" index="3" bw="0" slack="2147483647"/>
<pin id="204" dir="1" index="4" bw="1" slack="0"/>
</pin_list>
<bind>
<opcode="phi(47) " fcode="phi"/>
<opset="eol_0/5 "/>
</bind>
</comp>
<comp id="207" class="1005" name="axi_last_V_2_reg_207">
<pin_list>
<pin id="208" dir="0" index="0" bw="1" slack="0"/>
<pin id="209" dir="1" index="1" bw="1" slack="0"/>
</pin_list>
<bind>
<opset="axi_last_V_2 (phireg) "/>
</bind>
</comp>
<comp id="212" class="1004" name="axi_last_V_2_phi_fu_212">
<pin_list>
<pin id="213" dir="0" index="0" bw="1" slack="0"/>
<pin id="214" dir="0" index="1" bw="0" slack="2147483647"/>
<pin id="215" dir="0" index="2" bw="1" slack="0"/>
<pin id="216" dir="0" index="3" bw="0" slack="2147483647"/>
<pin id="217" dir="1" index="4" bw="1" slack="0"/>
</pin_list>
<bind>
<opcode="phi(47) " fcode="phi"/>
<opset="axi_last_V_2/5 "/>
</bind>
</comp>
<comp id="220" class="1005" name="p_Val2_s_reg_220">
<pin_list>
<pin id="221" dir="0" index="0" bw="24" slack="0"/>
<pin id="222" dir="1" index="1" bw="24" slack="0"/>
</pin_list>
<bind>
<opset="p_Val2_s (phireg) "/>
</bind>
</comp>
<comp id="224" class="1004" name="p_Val2_s_phi_fu_224">
<pin_list>
<pin id="225" dir="0" index="0" bw="24" slack="0"/>
<pin id="226" dir="0" index="1" bw="0" slack="2147483647"/>
<pin id="227" dir="0" index="2" bw="24" slack="0"/>
<pin id="228" dir="0" index="3" bw="0" slack="2147483647"/>
<pin id="229" dir="1" index="4" bw="24" slack="0"/>
</pin_list>
<bind>
<opcode="phi(47) " fcode="phi"/>
<opset="p_Val2_s/5 "/>
</bind>
</comp>
<comp id="232" class="1005" name="axi_last_V_3_reg_232">
<pin_list>
<pin id="233" dir="0" index="0" bw="1" slack="1"/>
<pin id="234" dir="1" index="1" bw="1" slack="1"/>
</pin_list>
<bind>
<opset="axi_last_V_3 (phireg) "/>
</bind>
</comp>
<comp id="236" class="1004" name="axi_last_V_3_phi_fu_236">
<pin_list>
<pin id="237" dir="0" index="0" bw="1" slack="0"/>
<pin id="238" dir="0" index="1" bw="0" slack="2147483647"/>
<pin id="239" dir="0" index="2" bw="1" slack="2"/>
<pin id="240" dir="0" index="3" bw="0" slack="2147483647"/>
<pin id="241" dir="1" index="4" bw="1" slack="1"/>
</pin_list>
<bind>
<opcode="phi(47) " fcode="phi"/>
<opset="axi_last_V_3/8 "/>
</bind>
</comp>
<comp id="244" class="1005" name="axi_data_V_3_reg_244">
<pin_list>
<pin id="245" dir="0" index="0" bw="24" slack="1"/>
<pin id="246" dir="1" index="1" bw="24" slack="1"/>
</pin_list>
<bind>
<opset="axi_data_V_3 (phireg) "/>
</bind>
</comp>
<comp id="248" class="1004" name="axi_data_V_3_phi_fu_248">
<pin_list>
<pin id="249" dir="0" index="0" bw="24" slack="0"/>
<pin id="250" dir="0" index="1" bw="0" slack="2147483647"/>
<pin id="251" dir="0" index="2" bw="24" slack="2"/>
<pin id="252" dir="0" index="3" bw="0" slack="2147483647"/>
<pin id="253" dir="1" index="4" bw="24" slack="1"/>
</pin_list>
<bind>
<opcode="phi(47) " fcode="phi"/>
<opset="axi_data_V_3/8 "/>
</bind>
</comp>
<comp id="256" class="1005" name="eol_2_reg_256">
<pin_list>
<pin id="257" dir="0" index="0" bw="1" slack="2147483647"/>
<pin id="258" dir="1" index="1" bw="1" slack="2147483647"/>
</pin_list>
<bind>
<opset="eol_2 (phireg) "/>
</bind>
</comp>
<comp id="259" class="1004" name="eol_2_phi_fu_259">
<pin_list>
<pin id="260" dir="0" index="0" bw="1" slack="0"/>
<pin id="261" dir="0" index="1" bw="0" slack="2147483647"/>
<pin id="262" dir="0" index="2" bw="1" slack="2"/>
<pin id="263" dir="0" index="3" bw="0" slack="2147483647"/>
<pin id="264" dir="1" index="4" bw="1" slack="2147483647"/>
</pin_list>
<bind>
<opcode="phi(47) " fcode="phi"/>
<opset="eol_2/8 "/>
</bind>
</comp>
<comp id="266" class="1004" name="grp_fu_266">
<pin_list>
<pin id="267" dir="0" index="0" bw="34" slack="0"/>
<pin id="268" dir="1" index="1" bw="24" slack="0"/>
</pin_list>
<bind>
<opcode="extractvalue(56) " fcode="extractvalue"/>
<opset="tmp_data_V/2 tmp_data_V_1/5 tmp_data_V_2/8 "/>
</bind>
</comp>
<comp id="271" class="1004" name="grp_fu_271">
<pin_list>
<pin id="272" dir="0" index="0" bw="34" slack="0"/>
<pin id="273" dir="1" index="1" bw="1" slack="0"/>
</pin_list>
<bind>
<opcode="extractvalue(56) " fcode="extractvalue"/>
<opset="tmp_last_V/2 tmp_last_V_1/5 tmp_last_V_2/8 "/>
</bind>
</comp>
<comp id="276" class="1004" name="tmp_user_V_fu_276">
<pin_list>
<pin id="277" dir="0" index="0" bw="34" slack="0"/>
<pin id="278" dir="1" index="1" bw="1" slack="2147483647"/>
</pin_list>
<bind>
<opcode="extractvalue(56) " fcode="extractvalue"/>
<opset="tmp_user_V/2 "/>
</bind>
</comp>
<comp id="280" class="1004" name="store_ln71_store_fu_280">
<pin_list>
<pin id="281" dir="0" index="0" bw="1" slack="0"/>
<pin id="282" dir="0" index="1" bw="1" slack="0"/>
<pin id="283" dir="1" index="2" bw="0" slack="2147483647"/>
</pin_list>
<bind>
<opcode="store(28) " fcode="store"/>
<opset="store_ln71/3 "/>
</bind>
</comp>
<comp id="285" class="1004" name="icmp_ln71_fu_285">
<pin_list>
<pin id="286" dir="0" index="0" bw="11" slack="0"/>
<pin id="287" dir="0" index="1" bw="11" slack="0"/>
<pin id="288" dir="1" index="2" bw="1" slack="1"/>
</pin_list>
<bind>
<opcode="icmp(45) " fcode="icmp"/>
<opset="icmp_ln71/4 "/>
</bind>
</comp>
<comp id="291" class="1004" name="i_V_fu_291">
<pin_list>
<pin id="292" dir="0" index="0" bw="11" slack="0"/>
<pin id="293" dir="0" index="1" bw="1" slack="0"/>
<pin id="294" dir="1" index="2" bw="11" slack="0"/>
</pin_list>
<bind>
<opcode="add(8) " fcode="add"/>
<opset="i_V/4 "/>
</bind>
</comp>
<comp id="297" class="1004" name="icmp_ln73_fu_297">
<pin_list>
<pin id="298" dir="0" index="0" bw="11" slack="0"/>
<pin id="299" dir="0" index="1" bw="8" slack="0"/>
<pin id="300" dir="1" index="2" bw="1" slack="1"/>
</pin_list>
<bind>
<opcode="icmp(45) " fcode="icmp"/>
<opset="icmp_ln73/5 "/>
</bind>
</comp>
<comp id="303" class="1004" name="j_V_fu_303">
<pin_list>
<pin id="304" dir="0" index="0" bw="11" slack="0"/>
<pin id="305" dir="0" index="1" bw="1" slack="0"/>
<pin id="306" dir="1" index="2" bw="11" slack="0"/>
</pin_list>
<bind>
<opcode="add(8) " fcode="add"/>
<opset="j_V/5 "/>
</bind>
</comp>
<comp id="309" class="1004" name="sof_1_load_load_fu_309">
<pin_list>
<pin id="310" dir="0" index="0" bw="1" slack="2"/>
<pin id="311" dir="1" index="1" bw="1" slack="0"/>
</pin_list>
<bind>
<opcode="load(27) " fcode="load"/>
<opset="sof_1_load/5 "/>
</bind>
</comp>
<comp id="312" class="1004" name="or_ln76_fu_312">
<pin_list>
<pin id="313" dir="0" index="0" bw="1" slack="0"/>
<pin id="314" dir="0" index="1" bw="1" slack="0"/>
<pin id="315" dir="1" index="2" bw="1" slack="1"/>
</pin_list>
<bind>
<opcode="or(24) " fcode="or"/>
<opset="or_ln76/5 "/>
</bind>
</comp>
<comp id="318" class="1004" name="tmp_fu_318">
<pin_list>
<pin id="319" dir="0" index="0" bw="24" slack="0"/>
<pin id="320" dir="1" index="1" bw="8" slack="1"/>
</pin_list>
<bind>
<opcode="trunc(33) " fcode="trunc"/>
<opset="tmp/5 "/>
</bind>
</comp>
<comp id="322" class="1004" name="tmp_28_fu_322">
<pin_list>
<pin id="323" dir="0" index="0" bw="8" slack="0"/>
<pin id="324" dir="0" index="1" bw="24" slack="0"/>
<pin id="325" dir="0" index="2" bw="5" slack="0"/>
<pin id="326" dir="0" index="3" bw="5" slack="0"/>
<pin id="327" dir="1" index="4" bw="8" slack="1"/>
</pin_list>
<bind>
<opcode="partselect(1002) " fcode="partselect"/>
<opset="tmp_28/5 "/>
</bind>
</comp>
<comp id="332" class="1004" name="tmp_29_fu_332">
<pin_list>
<pin id="333" dir="0" index="0" bw="8" slack="0"/>
<pin id="334" dir="0" index="1" bw="24" slack="0"/>
<pin id="335" dir="0" index="2" bw="6" slack="0"/>
<pin id="336" dir="0" index="3" bw="6" slack="0"/>
<pin id="337" dir="1" index="4" bw="8" slack="1"/>
</pin_list>
<bind>
<opcode="partselect(1002) " fcode="partselect"/>
<opset="tmp_29/5 "/>
</bind>
</comp>
<comp id="342" class="1004" name="store_ln73_store_fu_342">
<pin_list>
<pin id="343" dir="0" index="0" bw="1" slack="0"/>
<pin id="344" dir="0" index="1" bw="1" slack="2"/>
<pin id="345" dir="1" index="2" bw="0" slack="2147483647"/>
</pin_list>
<bind>
<opcode="store(28) " fcode="store"/>
<opset="store_ln73/5 "/>
</bind>
</comp>
<comp id="347" class="1005" name="tmp_data_V_reg_347">
<pin_list>
<pin id="348" dir="0" index="0" bw="24" slack="2"/>
<pin id="349" dir="1" index="1" bw="24" slack="2"/>
</pin_list>
<bind>
<opset="tmp_data_V "/>
</bind>
</comp>
<comp id="355" class="1005" name="tmp_last_V_reg_355">
<pin_list>
<pin id="356" dir="0" index="0" bw="1" slack="2"/>
<pin id="357" dir="1" index="1" bw="1" slack="2"/>
</pin_list>
<bind>
<opset="tmp_last_V "/>
</bind>
</comp>
<comp id="360" class="1005" name="sof_1_reg_360">
<pin_list>
<pin id="361" dir="0" index="0" bw="1" slack="0"/>
<pin id="362" dir="1" index="1" bw="1" slack="0"/>
</pin_list>
<bind>
<opset="sof_1 "/>
</bind>
</comp>
<comp id="367" class="1005" name="icmp_ln71_reg_367">
<pin_list>
<pin id="368" dir="0" index="0" bw="1" slack="1"/>
<pin id="369" dir="1" index="1" bw="1" slack="2147483647"/>
</pin_list>
<bind>
<opset="icmp_ln71 "/>
</bind>
</comp>
<comp id="371" class="1005" name="i_V_reg_371">
<pin_list>
<pin id="372" dir="0" index="0" bw="11" slack="0"/>
<pin id="373" dir="1" index="1" bw="11" slack="0"/>
</pin_list>
<bind>
<opset="i_V "/>
</bind>
</comp>
<comp id="376" class="1005" name="icmp_ln73_reg_376">
<pin_list>
<pin id="377" dir="0" index="0" bw="1" slack="1"/>
<pin id="378" dir="1" index="1" bw="1" slack="2147483647"/>
</pin_list>
<bind>
<opset="icmp_ln73 "/>
</bind>
</comp>
<comp id="380" class="1005" name="j_V_reg_380">
<pin_list>
<pin id="381" dir="0" index="0" bw="11" slack="0"/>
<pin id="382" dir="1" index="1" bw="11" slack="0"/>
</pin_list>
<bind>
<opset="j_V "/>
</bind>
</comp>
<comp id="385" class="1005" name="or_ln76_reg_385">
<pin_list>
<pin id="386" dir="0" index="0" bw="1" slack="1"/>
<pin id="387" dir="1" index="1" bw="1" slack="2147483647"/>
</pin_list>
<bind>
<opset="or_ln76 "/>
</bind>
</comp>
<comp id="389" class="1005" name="tmp_reg_389">
<pin_list>
<pin id="390" dir="0" index="0" bw="8" slack="1"/>
<pin id="391" dir="1" index="1" bw="8" slack="1"/>
</pin_list>
<bind>
<opset="tmp "/>
</bind>
</comp>
<comp id="394" class="1005" name="tmp_28_reg_394">
<pin_list>
<pin id="395" dir="0" index="0" bw="8" slack="1"/>
<pin id="396" dir="1" index="1" bw="8" slack="1"/>
</pin_list>
<bind>
<opset="tmp_28 "/>
</bind>
</comp>
<comp id="399" class="1005" name="tmp_29_reg_399">
<pin_list>
<pin id="400" dir="0" index="0" bw="8" slack="1"/>
<pin id="401" dir="1" index="1" bw="8" slack="1"/>
</pin_list>
<bind>
<opset="tmp_29 "/>
</bind>
</comp>
<comp id="404" class="1005" name="tmp_data_V_2_reg_404">
<pin_list>
<pin id="405" dir="0" index="0" bw="24" slack="0"/>
<pin id="406" dir="1" index="1" bw="24" slack="0"/>
</pin_list>
<bind>
<opset="tmp_data_V_2 "/>
</bind>
</comp>
<comp id="409" class="1005" name="tmp_last_V_2_reg_409">
<pin_list>
<pin id="410" dir="0" index="0" bw="1" slack="0"/>
<pin id="411" dir="1" index="1" bw="1" slack="0"/>
</pin_list>
<bind>
<opset="tmp_last_V_2 "/>
</bind>
</comp>
</comp_list>
<net_list>
<net id="91"><net_src comp="34" pin="0"/><net_sink comp="88" pin=0"/></net>
<net id="102"><net_src comp="48" pin="0"/><net_sink comp="92" pin=0"/></net>
<net id="103"><net_src comp="0" pin="0"/><net_sink comp="92" pin=1"/></net>
<net id="104"><net_src comp="2" pin="0"/><net_sink comp="92" pin=2"/></net>
<net id="105"><net_src comp="4" pin="0"/><net_sink comp="92" pin=3"/></net>
<net id="106"><net_src comp="6" pin="0"/><net_sink comp="92" pin=4"/></net>
<net id="107"><net_src comp="8" pin="0"/><net_sink comp="92" pin=5"/></net>
<net id="108"><net_src comp="10" pin="0"/><net_sink comp="92" pin=6"/></net>
<net id="109"><net_src comp="12" pin="0"/><net_sink comp="92" pin=7"/></net>
<net id="115"><net_src comp="84" pin="0"/><net_sink comp="110" pin=0"/></net>
<net id="116"><net_src comp="14" pin="0"/><net_sink comp="110" pin=1"/></net>
<net id="122"><net_src comp="84" pin="0"/><net_sink comp="117" pin=0"/></net>
<net id="123"><net_src comp="16" pin="0"/><net_sink comp="117" pin=1"/></net>
<net id="129"><net_src comp="84" pin="0"/><net_sink comp="124" pin=0"/></net>
<net id="130"><net_src comp="18" pin="0"/><net_sink comp="124" pin=1"/></net>
<net id="140"><net_src comp="134" pin="4"/><net_sink comp="131" pin=0"/></net>
<net id="150"><net_src comp="144" pin="4"/><net_sink comp="141" pin=0"/></net>
<net id="154"><net_src comp="54" pin="0"/><net_sink comp="151" pin=0"/></net>
<net id="161"><net_src comp="151" pin="1"/><net_sink comp="155" pin=2"/></net>
<net id="171"><net_src comp="131" pin="1"/><net_sink comp="165" pin=0"/></net>
<net id="172"><net_src comp="165" pin="4"/><net_sink comp="162" pin=0"/></net>
<net id="182"><net_src comp="141" pin="1"/><net_sink comp="176" pin=0"/></net>
<net id="183"><net_src comp="176" pin="4"/><net_sink comp="173" pin=0"/></net>
<net id="187"><net_src comp="54" pin="0"/><net_sink comp="184" pin=0"/></net>
<net id="194"><net_src comp="184" pin="1"/><net_sink comp="188" pin=0"/></net>
<net id="198"><net_src comp="64" pin="0"/><net_sink comp="195" pin=0"/></net>
<net id="205"><net_src comp="195" pin="1"/><net_sink comp="199" pin=0"/></net>
<net id="206"><net_src comp="199" pin="4"/><net_sink comp="195" pin=0"/></net>
<net id="210"><net_src comp="207" pin="1"/><net_sink comp="165" pin=2"/></net>
<net id="211"><net_src comp="207" pin="1"/><net_sink comp="199" pin=2"/></net>
<net id="218"><net_src comp="165" pin="4"/><net_sink comp="212" pin=2"/></net>
<net id="219"><net_src comp="212" pin="4"/><net_sink comp="207" pin=0"/></net>
<net id="223"><net_src comp="220" pin="1"/><net_sink comp="176" pin=2"/></net>
<net id="230"><net_src comp="176" pin="4"/><net_sink comp="224" pin=2"/></net>
<net id="231"><net_src comp="224" pin="4"/><net_sink comp="220" pin=0"/></net>
<net id="235"><net_src comp="232" pin="1"/><net_sink comp="134" pin=0"/></net>
<net id="242"><net_src comp="162" pin="1"/><net_sink comp="236" pin=2"/></net>
<net id="243"><net_src comp="236" pin="4"/><net_sink comp="232" pin=0"/></net>
<net id="247"><net_src comp="244" pin="1"/><net_sink comp="144" pin=0"/></net>
<net id="254"><net_src comp="173" pin="1"/><net_sink comp="248" pin=2"/></net>
<net id="255"><net_src comp="248" pin="4"/><net_sink comp="244" pin=0"/></net>
<net id="265"><net_src comp="195" pin="1"/><net_sink comp="259" pin=2"/></net>
<net id="269"><net_src comp="92" pin="8"/><net_sink comp="266" pin=0"/></net>
<net id="270"><net_src comp="266" pin="1"/><net_sink comp="224" pin=0"/></net>
<net id="274"><net_src comp="92" pin="8"/><net_sink comp="271" pin=0"/></net>
<net id="275"><net_src comp="271" pin="1"/><net_sink comp="212" pin=0"/></net>
<net id="279"><net_src comp="92" pin="8"/><net_sink comp="276" pin=0"/></net>
<net id="284"><net_src comp="52" pin="0"/><net_sink comp="280" pin=0"/></net>
<net id="289"><net_src comp="155" pin="4"/><net_sink comp="285" pin=0"/></net>
<net id="290"><net_src comp="56" pin="0"/><net_sink comp="285" pin=1"/></net>
<net id="295"><net_src comp="155" pin="4"/><net_sink comp="291" pin=0"/></net>
<net id="296"><net_src comp="58" pin="0"/><net_sink comp="291" pin=1"/></net>
<net id="301"><net_src comp="188" pin="4"/><net_sink comp="297" pin=0"/></net>
<net id="302"><net_src comp="66" pin="0"/><net_sink comp="297" pin=1"/></net>
<net id="307"><net_src comp="188" pin="4"/><net_sink comp="303" pin=0"/></net>
<net id="308"><net_src comp="58" pin="0"/><net_sink comp="303" pin=1"/></net>
<net id="316"><net_src comp="309" pin="1"/><net_sink comp="312" pin=0"/></net>
<net id="317"><net_src comp="199" pin="4"/><net_sink comp="312" pin=1"/></net>
<net id="321"><net_src comp="224" pin="4"/><net_sink comp="318" pin=0"/></net>
<net id="328"><net_src comp="70" pin="0"/><net_sink comp="322" pin=0"/></net>
<net id="329"><net_src comp="224" pin="4"/><net_sink comp="322" pin=1"/></net>
<net id="330"><net_src comp="72" pin="0"/><net_sink comp="322" pin=2"/></net>
<net id="331"><net_src comp="74" pin="0"/><net_sink comp="322" pin=3"/></net>
<net id="338"><net_src comp="70" pin="0"/><net_sink comp="332" pin=0"/></net>
<net id="339"><net_src comp="224" pin="4"/><net_sink comp="332" pin=1"/></net>
<net id="340"><net_src comp="30" pin="0"/><net_sink comp="332" pin=2"/></net>
<net id="341"><net_src comp="76" pin="0"/><net_sink comp="332" pin=3"/></net>
<net id="346"><net_src comp="64" pin="0"/><net_sink comp="342" pin=0"/></net>
<net id="350"><net_src comp="266" pin="1"/><net_sink comp="347" pin=0"/></net>
<net id="351"><net_src comp="347" pin="1"/><net_sink comp="144" pin=2"/></net>
<net id="358"><net_src comp="271" pin="1"/><net_sink comp="355" pin=0"/></net>
<net id="359"><net_src comp="355" pin="1"/><net_sink comp="134" pin=2"/></net>
<net id="363"><net_src comp="88" pin="1"/><net_sink comp="360" pin=0"/></net>
<net id="364"><net_src comp="360" pin="1"/><net_sink comp="280" pin=1"/></net>
<net id="365"><net_src comp="360" pin="1"/><net_sink comp="309" pin=0"/></net>
<net id="366"><net_src comp="360" pin="1"/><net_sink comp="342" pin=1"/></net>
<net id="370"><net_src comp="285" pin="2"/><net_sink comp="367" pin=0"/></net>
<net id="374"><net_src comp="291" pin="2"/><net_sink comp="371" pin=0"/></net>
<net id="375"><net_src comp="371" pin="1"/><net_sink comp="155" pin=0"/></net>
<net id="379"><net_src comp="297" pin="2"/><net_sink comp="376" pin=0"/></net>
<net id="383"><net_src comp="303" pin="2"/><net_sink comp="380" pin=0"/></net>
<net id="384"><net_src comp="380" pin="1"/><net_sink comp="188" pin=2"/></net>
<net id="388"><net_src comp="312" pin="2"/><net_sink comp="385" pin=0"/></net>
<net id="392"><net_src comp="318" pin="1"/><net_sink comp="389" pin=0"/></net>
<net id="393"><net_src comp="389" pin="1"/><net_sink comp="110" pin=2"/></net>
<net id="397"><net_src comp="322" pin="4"/><net_sink comp="394" pin=0"/></net>
<net id="398"><net_src comp="394" pin="1"/><net_sink comp="117" pin=2"/></net>
<net id="402"><net_src comp="332" pin="4"/><net_sink comp="399" pin=0"/></net>
<net id="403"><net_src comp="399" pin="1"/><net_sink comp="124" pin=2"/></net>
<net id="407"><net_src comp="266" pin="1"/><net_sink comp="404" pin=0"/></net>
<net id="408"><net_src comp="404" pin="1"/><net_sink comp="248" pin=0"/></net>
<net id="412"><net_src comp="271" pin="1"/><net_sink comp="409" pin=0"/></net>
<net id="413"><net_src comp="409" pin="1"/><net_sink comp="236" pin=0"/></net>
<net id="414"><net_src comp="409" pin="1"/><net_sink comp="259" pin=0"/></net>
</net_list>
</model>
---------------- Datapath Model END ------------------
* FSMD analyzer results:
- Output states:
Port: img_data_stream_0_V | {6 }
Port: img_data_stream_1_V | {6 }
Port: img_data_stream_2_V | {6 }
- Input state :
Port: AXIvideo2Mat : AXI_video_strm_V_data_V | {2 5 8 }
Port: AXIvideo2Mat : AXI_video_strm_V_keep_V | {2 5 8 }
Port: AXIvideo2Mat : AXI_video_strm_V_strb_V | {2 5 8 }
Port: AXIvideo2Mat : AXI_video_strm_V_user_V | {2 5 8 }
Port: AXIvideo2Mat : AXI_video_strm_V_last_V | {2 5 8 }
Port: AXIvideo2Mat : AXI_video_strm_V_id_V | {2 5 8 }
Port: AXIvideo2Mat : AXI_video_strm_V_dest_V | {2 5 8 }
- Chain level:
State 1
State 2
empty_108 : 1
br_ln65 : 1
State 3
store_ln71 : 1
State 4
icmp_ln71 : 1
i_V : 1
br_ln71 : 2
State 5
icmp_ln73 : 1
j_V : 1
br_ln73 : 2
or_ln76 : 1
br_ln76 : 1
axi_last_V_2 : 2
p_Val2_s : 2
tmp : 3
tmp_28 : 3
tmp_29 : 3
State 6
empty_110 : 1
empty_111 : 1
State 7
State 8
br_ln96 : 1
empty_113 : 1
State 9
============================================================
+ Verbose Summary: Datapath Resource usage
============================================================
* Functional unit list:
|----------|--------------------------|---------|---------|
| Operation| Functional Unit | FF | LUT |
|----------|--------------------------|---------|---------|
| icmp | icmp_ln71_fu_285 | 0 | 13 |
| | icmp_ln73_fu_297 | 0 | 13 |
|----------|--------------------------|---------|---------|
| add | i_V_fu_291 | 0 | 13 |
| | j_V_fu_303 | 0 | 13 |
|----------|--------------------------|---------|---------|
| or | or_ln76_fu_312 | 0 | 2 |
|----------|--------------------------|---------|---------|
| read | grp_read_fu_92 | 0 | 0 |
|----------|--------------------------|---------|---------|
| | write_ln703_write_fu_110 | 0 | 0 |
| write | write_ln703_write_fu_117 | 0 | 0 |
| | write_ln703_write_fu_124 | 0 | 0 |
|----------|--------------------------|---------|---------|
| | grp_fu_266 | 0 | 0 |
|extractvalue| grp_fu_271 | 0 | 0 |
| | tmp_user_V_fu_276 | 0 | 0 |
|----------|--------------------------|---------|---------|
| trunc | tmp_fu_318 | 0 | 0 |
|----------|--------------------------|---------|---------|
|partselect| tmp_28_fu_322 | 0 | 0 |
| | tmp_29_fu_332 | 0 | 0 |
|----------|--------------------------|---------|---------|
| Total | | 0 | 54 |
|----------|--------------------------|---------|---------|
Memories:
N/A
* Register list:
+--------------------+--------+
| | FF |
+--------------------+--------+
|axi_data_V_0_reg_141| 24 |
|axi_data_V_1_reg_173| 24 |
|axi_data_V_3_reg_244| 24 |
|axi_last_V_0_reg_131| 1 |
|axi_last_V_2_reg_207| 1 |
|axi_last_V_3_reg_232| 1 |
| eol_0_reg_195 | 1 |
| eol_2_reg_256 | 1 |
| eol_reg_162 | 1 |
| i_V_reg_371 | 11 |
| icmp_ln71_reg_367 | 1 |
| icmp_ln73_reg_376 | 1 |
| j_V_reg_380 | 11 |
| or_ln76_reg_385 | 1 |
| p_Val2_s_reg_220 | 24 |
| sof_1_reg_360 | 1 |
| t_V_5_reg_184 | 11 |
| t_V_reg_151 | 11 |
| tmp_28_reg_394 | 8 |
| tmp_29_reg_399 | 8 |
|tmp_data_V_2_reg_404| 24 |
| tmp_data_V_reg_347 | 24 |
|tmp_last_V_2_reg_409| 1 |
| tmp_last_V_reg_355 | 1 |
| tmp_reg_389 | 8 |
+--------------------+--------+
| Total | 224 |
+--------------------+--------+
* Multiplexer (MUX) list:
|---------------|------|------|------|--------||---------||---------|
| Comp | Pin | Size | BW | S x BW || Delay || LUT |
|---------------|------|------|------|--------||---------||---------|
| eol_0_reg_195 | p0 | 2 | 1 | 2 || 9 |
|---------------|------|------|------|--------||---------||---------|
| Total | | | | 2 || 1.769 || 9 |
|---------------|------|------|------|--------||---------||---------|
* Summary:
+-----------+--------+--------+--------+
| | Delay | FF | LUT |
+-----------+--------+--------+--------+
| Function | - | 0 | 54 |
| Memory | - | - | - |
|Multiplexer| 1 | - | 9 |
| Register | - | 224 | - |
+-----------+--------+--------+--------+
| Total | 1 | 224 | 63 |
+-----------+--------+--------+--------+
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