129 lines
5.2 KiB
C++
129 lines
5.2 KiB
C++
/*****************************************************************************
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* CACTI 7.0
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* SOFTWARE LICENSE AGREEMENT
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* Copyright 2015 Hewlett-Packard Development Company, L.P.
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* All Rights Reserved
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.”
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*
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***************************************************************************/
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#include "area.h"
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#include "powergating.h"
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#include "parameter.h"
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#include <iostream>
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#include <math.h>
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#include <assert.h>
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using namespace std;
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//TODO: although DTSN is used,since for memory array, the number of sleep txs
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//is related to the number of rows and cols. so All calculations are still base on
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//single sleep tx cases
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Sleep_tx::Sleep_tx(
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double _perf_with_sleep_tx,
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double _active_Isat,//of circuit block, not sleep tx
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bool _is_footer,
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double _c_circuit_wakeup,
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double _V_delta,
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int _num_sleep_tx,
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// double _vt_circuit,
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// double _vt_sleep_tx,
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// double _mobility,//of sleep tx
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// double _c_ox,//of sleep tx
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const Area & cell_)
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:perf_with_sleep_tx(_perf_with_sleep_tx),
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active_Isat(_active_Isat),
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is_footer(_is_footer),
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c_circuit_wakeup(_c_circuit_wakeup),
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V_delta(_V_delta),
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num_sleep_tx(_num_sleep_tx),
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// vt_circuit(_vt_circuit),
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// vt_sleep_tx(_vt_sleep_tx),
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// mobility(_mobility),
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// c_ox(_c_ox)
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cell(cell_),
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is_sleep_tx(true)
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{
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//a single sleep tx in a network
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double raw_area, raw_width, raw_hight;
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double p_to_n_sz_ratio = pmos_to_nmos_sz_ratio(false, false, true);
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vdd = g_tp.peri_global.Vdd;
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vt_circuit = g_tp.peri_global.Vth;
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vt_sleep_tx = g_tp.sleep_tx.Vth;
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mobility = g_tp.sleep_tx.Mobility_n;
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c_ox = g_tp.sleep_tx.C_ox;
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width = active_Isat/(perf_with_sleep_tx*mobility*c_ox*(vdd-vt_circuit)*(vdd-vt_sleep_tx))*g_ip->F_sz_um;//W/L uses physical numbers
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width /= num_sleep_tx;
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raw_area = compute_gate_area(INV, 1, width, p_to_n_sz_ratio*width, cell.w*2)/2; //Only single device, assuming device is laide on the side
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raw_width = cell.w;
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raw_hight = raw_area/cell.w;
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area.set_h(raw_hight);
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area.set_w(raw_width);
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compute_penalty();
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}
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double Sleep_tx::compute_penalty()
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{
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//V_delta = VDD - VCCmin nothing to do with threshold of sleep tx. Although it might be OK to use sleep tx to control the V_delta
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// double c_load;
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double p_to_n_sz_ratio = pmos_to_nmos_sz_ratio(false, false, true);
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if (is_footer)
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{
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c_intrinsic_sleep = drain_C_(width, NCH, 1, 1, area.h, false, false, false,is_sleep_tx);
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// V_delta = _V_delta;
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wakeup_delay = (c_circuit_wakeup + c_intrinsic_sleep)*V_delta/(simplified_nmos_Isat(width, false, false, false,is_sleep_tx)/Ilinear_to_Isat_ratio);
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wakeup_power.readOp.dynamic = (c_circuit_wakeup + c_intrinsic_sleep)*g_tp.sram_cell.Vdd*V_delta;
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//no 0.5 because the half of the energy spend in entering sleep and half of the energy will be spent in waking up. And they are pairs
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}
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else
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{
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c_intrinsic_sleep = drain_C_(width*p_to_n_sz_ratio, PCH, 1, 1, area.h, false, false, false,is_sleep_tx);
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// V_delta = _V_delta;
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wakeup_delay = (c_circuit_wakeup + c_intrinsic_sleep)*V_delta/(simplified_pmos_Isat(width, false, false, false,is_sleep_tx)/Ilinear_to_Isat_ratio);
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wakeup_power.readOp.dynamic = (c_circuit_wakeup + c_intrinsic_sleep)*g_tp.sram_cell.Vdd*V_delta;
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}
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return wakeup_delay;
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/*
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The number of cycles in the wake-up latency set the constraint on the
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minimum number of idle clock cycles needed before a processor
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can enter in the corresponding sleep mode without any wakeup
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overhead.
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If the circuit is half way to sleep then waken up, it is still OK
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just the wakeup latency will be shorter than the wakeup time from full asleep.
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So, the sleep time and energy does not matter
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*/
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}
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