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50 lines
1.3 KiB
Plaintext
50 lines
1.3 KiB
Plaintext
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MEMORY {
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sdram_for_arm_1 (rwx) : ORIGIN = 0x00000000, LENGTH = 256M /* Lenght should be 1G - gpu_mem */
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}
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__kernel_load_addr = 0x80000; /* 0x80000 because AArch64 (0x8000 is for AArch32) */
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ENTRY(__kernel_load_addr)
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PHDRS
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{
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segment_core_stack PT_LOAD FLAGS(6);
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segment_code PT_LOAD FLAGS(5);
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segment_data PT_LOAD FLAGS(6);
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}
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SECTIONS
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{
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.core_stack (NOLOAD) :
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{
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__core_stack_start = .;
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. += __kernel_load_addr; /* TODO: Don't like this, it only work because it starts at 0x0 */
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__core_stack_end = .;
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} > sdram_for_arm_1 : segment_core_stack
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.text :
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{
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. = __kernel_load_addr;
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KEEP(*(.text._start))
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*(.text._start_arg) /* Static read by _start() */
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*(.text._start_rust) /* Enty point in rust */
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*(.text*) /* The rest of the code */
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} > sdram_for_arm_1 :segment_code
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.rodata : ALIGN(8) { *(.rodata) } > sdram_for_arm_1 :segment_code
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/* TODO: not sure having the RODATA in an executable
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segment is a good practice? */
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.data : { *(.data) } > sdram_for_arm_1 :segment_data
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.bss (NOLOAD) : ALIGN(16)
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{
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__bss_start = .;
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*(.bss*);
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. = ALIGN(16);
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__bss_end = .;
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} > sdram_for_arm_1 :segment_data
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/* GOT? */
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}
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ENTRY(_start)
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