judas/linker.ld

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2022-10-11 23:53:12 +02:00
MEMORY {
sdram_for_arm_1 (rwx) : ORIGIN = 0x00000000, LENGTH = 256M /* Lenght should be 1G - gpu_mem */
}
__kernel_load_addr = 0x80000; /* 0x80000 because AArch64 (0x8000 is for AArch32) */
ENTRY(__kernel_load_addr)
PHDRS
{
segment_core_stack PT_LOAD FLAGS(6);
segment_code PT_LOAD FLAGS(5);
segment_data PT_LOAD FLAGS(6);
}
SECTIONS
{
.core_stack (NOLOAD) :
{
__core_stack_start = .;
. += __kernel_load_addr; /* TODO: Don't like this, it only work because it starts at 0x0 */
__core_stack_end = .;
} > sdram_for_arm_1 : segment_core_stack
.text :
{
. = __kernel_load_addr;
KEEP(*(.text._start))
*(.text._start_arg) /* Static read by _start() */
*(.text._start_rust) /* Enty point in rust */
*(.text*) /* The rest of the code */
} > sdram_for_arm_1 :segment_code
.rodata : ALIGN(8) { *(.rodata) } > sdram_for_arm_1 :segment_code
/* TODO: not sure having the RODATA in an executable
segment is a good practice? */
.data : { *(.data) } > sdram_for_arm_1 :segment_data
.bss (NOLOAD) : ALIGN(16)
{
__bss_start = .;
*(.bss*);
. = ALIGN(16);
__bss_end = .;
} > sdram_for_arm_1 :segment_data
/* GOT? */
}
ENTRY(_start)